| Regional congestion awareness for load balance in networks-on-chip P Gratz, B Grot, SW Keckler 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 499 | 2008 |
| Kilo-NOC: A Heterogeneous Network-on-chip Architecture for Scalability and Service Guarantees B Grot, J Hestness, SW Keckler, O Mutlu Proceedings of the 38th Annual International Symposium on Computer …, 2011 | 303 | 2011 |
| Scale-out processors P Lotfi-Kamran, B Grot, M Ferdman, S Volos, O Kocberber, J Picorel, ... ACM SIGARCH Computer Architecture News 40 (3), 500-511, 2012 | 279 | 2012 |
| Meet the walkers: Accelerating index traversals for in-memory databases O Kocberber, B Grot, J Picorel, B Falsafi, K Lim, P Ranganathan Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 274 | 2013 |
| Express cube topologies for on-chip interconnects B Grot, J Hestness, SW Keckler, O Mutlu 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 268 | 2009 |
| Preemptive virtual clock: A flexible, efficient, and cost-effective qos scheme for networks-on-chip B Grot, SW Keckler, O Mutlu Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009 | 247 | 2009 |
| Scale-out NUMA S Novakovic, A Daglis, E Bugnion, B Falsafi, B Grot Proceedings of the 19th International Conference on Architectural support …, 2014 | 225 | 2014 |
| Benchmarking, analysis, and optimization of serverless function snapshots D Ustiugov, P Petrov, M Kogias, E Bugnion, B Grot Proceedings of the 26th ACM International Conference on Architectural …, 2021 | 182 | 2021 |
| Netrace: dependency-driven trace-based network-on-chip simulation J Hestness, B Grot, SW Keckler Proceedings of the Third International Workshop on Network on Chip …, 2010 | 177 | 2010 |
| The Mondrian Data Engine M Drumond, A Daglis, N Mirzadeh, D Ustiugov, J Picorel, B Falsafi, B Grot, ... 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture …, 2017 | 156 | 2017 |
| Topology-aware quality-of-service support in highly integrated chip multiprocessors B Grot, SW Keckler, O Mutlu Computer Architecture: ISCA 2010 International Workshops A4MMC, AMAS-BT …, 2012 | 97 | 2012 |
| CCNoC: Specializing on-chip interconnects for energy efficiency in cache-coherent servers S Volos, C Seiculescu, B Grot, NK Pour, B Falsafi, G De Micheli 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 67-74, 2012 | 93 | 2012 |
| Prefetched address translation A Margaritov, D Ustiugov, E Bugnion, B Grot Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 81 | 2019 |
| NOC-Out: Microarchitecting a scale-out processor P Lotfi-Kamran, B Grot, B Falsafi 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 177-187, 2012 | 80 | 2012 |
| Hermes: A fast, fault-tolerant and linearizable replication protocol A Katsarakis, V Gavrielatos, MRS Katebzadeh, A Joshi, A Dragojevic, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 74 | 2020 |
| Shift: Shared history instruction fetch for lean-core server processors C Kaynak, B Grot, B Falsafi Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 74 | 2013 |
| Blasting through the front-end bottleneck with shotgun R Kumar, B Grot, V Nagarajan ACM SIGPLAN Notices 53 (2), 30-42, 2018 | 72 | 2018 |
| Asynchronous memory access chaining O Kocberber, B Falsafi, B Grot Proceedings of the VLDB Endowment (PVLDB) 9 (4), 252-263, 2015 | 71 | 2015 |
| Boomerang: a Metadata-Free Architecture for Control Flow Delivery R Kumar, CC Huang, B Grot, V Nagarajan 23rd International Symposium on High Performance Computer Architecture (HPCA), 2017 | 70 | 2017 |
| Method and apparatus for congestion-aware routing in a computer interconnection network P Gratz, B Grot, SW Keckler US Patent 8,285,900, 2012 | 70 | 2012 |
Babak FalsafiProfessor of Computer Science, EPFLVerified email at epfl.ch
