Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis FN Taher, M Kishani, BC Schafer 2018 IEEE 24th International Symposium on On-Line Testing And Robust System …, 2018 | 10 | 2018 |
A machine learning based hard fault recuperation model for approximate hardware accelerators FN Taher, J Callenes-Sloan, BC Schafer Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 9 | 2018 |
Exploring Design Trade-offs in Fault-Tolerant Behavioral Hardware Accelerators Z Zhu, FN Taher, B Carrion Schafer Proceedings of the 2019 on Great Lakes Symposium on VLSI, 291-294, 2019 | 6 | 2019 |
Learning-Based Diversity Estimation: Leveraging the Power of High-Level Synthesis to Mitigate Common-Mode Failure FN Taher, A Balachandran, BC Schafer 2019 IEEE 37th International Conference on Computer Design (ICCD), 460-467, 2019 | 3 | 2019 |
Common-Mode Failure Mitigation: Increasing Diversity through High-Level Synthesis FN Taher, M Joslin, A Balachandran, Z Zhu, BC Schafer 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 3 | 2019 |
A Low-Power Analog Bus for On-Chip Digital Communication F Taher | 2 | 2013 |
An Analog Bus for Low Power On-Chip Digital Communication FN Taher, S Sindia, VD Agrawal Work-in-Progress Poster Session, Design Automation Conference,(Austin, Texas), 2013 | 2 | 2013 |
Efficient Hardware Acceleration for Design Diversity Calculation to Mitigate Common Mode Failures MR Babu, FN Taher, A Balachandran, BC Schafer 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019 | 1 | 2019 |
Hardware Fault Compensation Using Discriminative Learning FN Taher, J Callenes-Sloan 2015 IEEE 21st Pacific Rim International Symposium on Dependable Computing …, 2015 | 1 | 2015 |
Fault Tolerance in Hardware Accelerators: Detection and Mitigation FN Taher The University of Texas at Dallas, 2019 | | 2019 |