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David Z. Pan
David Z. Pan
Professor, Silicon Labs Endowed Chair, ECE Dept., University of Texas at Austin
Verified email at ece.utexas.edu - Homepage
Title
Cited by
Cited by
Year
AppSAT: Approximately deobfuscating integrated circuits
K Shamsi, M Li, T Meade, Z Zhao, DZ Pan, Y Jin
2017 IEEE International Symposium on Hardware Oriented Security and Trust …, 2017
3492017
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
S Bobba, A Chakraborty, O Thomas, P Batude, T Ernst, O Faynot, DZ Pan, ...
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 336-343, 2011
2952011
Interconnect design for deep submicron ICs
Z Pan, L He, CK Koh, KY Khoo
1997 Proceedings of IEEE International Conference on Computer Aided Design …, 1997
2551997
Dreamplace: Deep learning toolkit-enabled gpu acceleration for modern vlsi placement
Y Lin, S Dhar, W Li, H Ren, B Khailany, DZ Pan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
2242019
Pushing ASIC performance in a power envelope
R Puri, L Stok, J Cohn, D Kung, D Pan, D Sylvester, A Srivastava, ...
Proceedings of the 40th annual Design Automation Conference, 788-793, 2003
2172003
Buffer block planning for interconnect-driven floorplanning
J Cong, T Kong, DZ Pan
1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1999
1941999
Improved crosstalk modeling for noise constrained interconnect optimization
J Cong, DZ Pan, PV Srinivas
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001
1922001
Provably secure camouflaging strategy for IC protection
M Li, K Shamsi, T Meade, Z Zhao, B Yu, Y Jin, DZ Pan
IEEE transactions on computer-aided design of integrated circuits and …, 2017
1902017
Redundant-via enhanced maze routing for yield improvement
G Xu, LD Huang, DZ Pan, MDF Wong
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
1892005
Layout decomposition for triple patterning lithography
B Yu, K Yuan, D Ding, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
1852015
Cyclic obfuscation for creating SAT-unresolvable circuits
K Shamsi, M Li, T Meade, Z Zhao, DZ Pan, Y Jin
Proceedings of the on Great Lakes Symposium on VLSI 2017, 173-178, 2017
1842017
An energy-efficient comparator with dynamic floating inverter amplifier
X Tang, L Shen, B Kasap, X Yang, W Shi, A Mukherjee, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 55 (4), 1011-1022, 2020
1782020
Multi-scale high-resolution vision transformer for semantic segmentation
J Gu, H Kwon, D Wang, W Ye, M Li, YH Chen, L Lai, V Chandra, DZ Pan
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2022
1722022
BoxRouter: A new global router based on box expansion and progressive ILP
M Cho, DZ Pan
Proceedings of the 43rd annual Design Automation Conference, 373-378, 2006
1692006
A high-performance droplet routing algorithm for digital microfluidic biochips
M Cho, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
1672008
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
M Jung, J Mitra, DZ Pan, SK Lim
Communications of the ACM 57 (1), 107-115, 2014
1662014
Double patterning layout decomposition for simultaneous conflict and stitch minimization
K Yuan, JS Yang, D Pan
Proceedings of the 2009 international symposium on Physical design, 107-114, 2009
1562009
RADAR: RET-aware detailed routing using fast lithography simulations
J Mitra, P Yu, DZ Pan
Proceedings of the 42nd annual Design Automation Conference, 369-372, 2005
1442005
TSV stress aware timing analysis with applications to 3D-IC layout optimization
J Yang, K Athikulwongse, YJ Lee, SK Lim, DZ Pan
Proceedings of the 47th Design Automation Conference, 803-806, 2010
1432010
BoxRouter 2.0: Architecture and implementation of a hybrid and robust global router
M Cho, K Lu, K Yuan, DZ Pan
2007 IEEE/ACM International Conference on Computer-Aided Design, 503-508, 2007
1402007
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Articles 1–20