| All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration M Sivan, Y Li, H Veluri, Y Zhao, B Tang, X Wang, E Zamburg, JF Leong, ... Nature communications 10 (1), 5201, 2019 | 130 | 2019 |
| Wafer-scale solution-processed 2D material analog resistive memory array for memory-based computing B Tang, H Veluri, Y Li, ZG Yu, M Waqar, JF Leong, M Sivan, E Zamburg, ... Nature Communications 13 (1), 3037, 2022 | 80 | 2022 |
| Low Subthreshold Swing and High Mobility Amorphous Indium–Gallium–Zinc-Oxide Thin-Film Transistor With Thin HfO2 Gate Dielectric and Excellent Uniformity S Samanta, U Chand, S Xu, K Han, Y Wu, C Wang, A Kumar, H Velluri, ... IEEE Electron Device Letters 41 (6), 856-859, 2020 | 52 | 2020 |
| High-throughput, area-efficient, and variation-tolerant 3-D in-memory compute system for deep convolutional neural networks H Veluri, Y Li, JX Niu, E Zamburg, AVY Thean IEEE Internet of Things Journal 8 (11), 9219-9232, 2021 | 17 | 2021 |
| 2-kbit Array of 3-D Monolithically-stacked IGZO FETs with Low SS-64mV/dec, Ultra-low-leakage, Competitive μ-57 cm2/V-s Performance and Novel nMOS-Only … U Chand, Z Fang, C Chun-Kuei, Y Luo, H Veluri, M Sivan, LJ Feng, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 16 | 2021 |
| Quantifying the benefits of monolithic 3D computing systems enabled by TFT and RRAM AM Felfel, K Datta, A Dutt, H Veluri, A Zaky, AVY Thean, MMS Aly 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 43-48, 2020 | 9 | 2020 |
| Aerosol Jet Printed WSe2 Based RRAM on Kapton Suitable for Flexible Monolithic Memory Integration Y Li, M Sivan, JX Niu, H Veluri, E Zamburg, J Leong, U Chand, S Samanta, ... 2019 IEEE International Conference on Flexible and Printable Sensors and …, 2019 | 8 | 2019 |
| Sub-10nm Ultra-thin ZnO Channel FET with Record-High 561 µA/µm ION at VDS 1V, High µ-84 cm2/V-s and1T-1RRAM Memory Cell Demonstration Memory … U Chand, MMS Aly, M Lal, C Chun-Kuei, S Hooda, SH Tsai, Z Fang, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 5 | 2022 |
| A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array H Veluri, U Chand, Y Li, B Tang, AVY Thean IEEE Transactions on Neural Networks and Learning Systems 34 (8), 4416-4427, 2021 | 5 | 2021 |
| Low-thermal-budget beol-compatible beyond-silicon transistor technologies for future monolithic-3d compute and memory applications A Thean, SH Tsai, CK Chen, M Sivan, B Tang, S Hooda, Z Fang, J Pan, ... 2022 International Electron Devices Meeting (IEDM), 12.2. 1-12.2. 4, 2022 | 3 | 2022 |
| Extremely- Scaled Channel Thickness ZnO FET with High Mobility 86 cm2/V-s, Low SS of 83mV/dec and Low Thermal Budget Process (<300°C) U Chand, C Chun-Kuei, M Lal, S Hooda, H Veluri, Z Fang, SH Tsai, ... 2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM …, 2022 | 2 | 2022 |
| Design-Technology Co-optimization (DTCO) for Emerging Disruptive Logic & Embedded Memory Process Technologies JX Niu, H Veluri, AVY Thean 2019 Electron Devices Technology and Manufacturing Conference (EDTM), 246-248, 2019 | 2 | 2019 |
| Planar-Staggered Array For DCNN Accelerators H Veluri, A Thean, Y Li, B Tang US Patent 20,240,028,880, 2025 | | 2025 |
| A Low-Latency DNN Accelerator Enabled by DFT-Based Convolution Execution Within Crossbar Arrays H Veluri, U Chand, CK Chen, AVY Thean IEEE Transactions on Neural Networks and Learning Systems, 2023 | | 2023 |
| Planar-Staggered Array for DCNN Accelerators H Veluri, VYA Thean, Y Li, B Tang WO Patent WO/2022/124,993, 2022 | | 2022 |
| DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING V HASITA | | 2022 |
| Design and Study of an Artificial Spiking Neuron Enabled by Low-Voltage SiOx-based ReRAM JXH Niu, Y Li, H Veluri, AVY Thean 2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2019 | | 2019 |
| Novel Dot-Product Engine for Low-Voltage Analog Oxide ReRAM Array H Veluri, Y Li, M Sivan, JX Niu, U Chand, JF Leong, E Zamburg, ... 2019 International Conference on Solid State Devices and Materials, 693-694, 2019 | | 2019 |
| Design of Artificial Spiking Neuron with SiO2 Memristive Synapse to Demonstrate Neuron-Level Spike Timing Dependent Plasticity JX Niu, H Veluri, Y Li, U Chand, JF Leong, E Zamburg, M Sivan, ... 2019 International Conference on IC Design and Technology (ICICDT), 1-3, 2019 | | 2019 |
