| A Survey of Accelerator Architectures for Deep Neural Networks Y Chen, Y Xie, L Song, F Chen, T Tang Engineering 6 (3), 264-274, 2020 | 280 | 2020 |
| ReGAN: A Pipelined ReRAM-based Accelerator for Generative Adversarial Networks F Chen, L Song, Y Chen 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 178-183, 2018 | 80 | 2018 |
| AccPAR: Tensor Partitioning for Heterogeneous Deep Learning Accelerators L Song, F Chen, Y Zhuo, X Qian, H Li, Y Chen IEEE International Symposium on High Performance Computer Architecture (HPCA …, 2020 | 54 | 2020 |
| ReRAM-based Accelerator for Deep Learning B Li, L Song, F Chen, X Qian, Y Chen, HH Li 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 815-820, 2018 | 41 | 2018 |
| ZARA: A novel Zero-Free Dataflow Accelerator for Generative Adversarial Networks in 3d ReRAM F Chen, L Song, HH Li, Y Chen The 56th Annual Design Automation Conference (DAC), 1-6, 2019 | 38 | 2019 |
| PARC: A processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM F Chen, L Song, Y Chen 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 175-180, 2020 | 22 | 2020 |
| Process Variation Aware Data Management for Magnetic Skyrmions Racetrack Memory F Chen, Z Li, W Kang, W Zhao, H Li, Y Chen 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 221-226, 2018 | 18 | 2018 |
| EMAT: An Efficient Multi-Task Architecture for Transfer Learning using ReRAM F Chen, H Li The International Conference on Computer-Aided Design (ICCAD), 1-6, 2018 | 16 | 2018 |
| Rerec: In-reram acceleration with access-aware mapping for personalized recommendation Y Wang, Z Zhu, F Chen, M Ma, G Dai, Y Wang, H Li, Y Chen 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 14 | 2021 |
| Exploring bit-slice sparsity in deep neural networks for efficient ReRAM-based deployment J Zhang, H Yang, F Chen, Y Wang, H Li 2019 Fifth Workshop on Energy Efficient Machine Learning and Cognitive …, 2019 | 11 | 2019 |
| Puffin: An Efficient DNN Training Accelerator for Direct Feedback Alignment in FeFET F Chen IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED …, 2021 | 10 | 2021 |
| LLMCarbon: Modeling the end-to-end Carbon Footprint of Large Language Models A Faiz, S Kaneda, R Wang, R Osi, P Sharma, F Chen, L Jiang International Conference on Learning Representations (ICLR), 2024 | 9 | 2024 |
| QMLP: An Error-Tolerant Nonlinear Quantum MLP Architecture using Parameterized Two-Qubit Gates C Chu, NH Chia, L Jiang, F Chen ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED …, 2022 | 9 | 2022 |
| Marvel: A vertical resistive accelerator for low-power deep learning inference in monolithic 3d F Chen, L Song, H Li, Y Chen 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 8 | 2021 |
| Deep Learning for Vertex Reconstruction of Neutrino-Nucleus Interaction Events with Combined Energy and Time Data L Song, F Chen, SR Young, CD Schuman, G Perdue, TE Potok IEEE International Conference on Acoustics, Speech and Signal Processing …, 2019 | 8 | 2019 |
| IQGAN: Robust Quantum Generative Adversarial Network for Image Synthesis On NISQ Devices C Chu, G Skipper, M Swany, F Chen IEEE International Conference on Acoustics, Speech, and Signal Processing …, 2023 | 7 | 2023 |
| Efficient Process-in-Memory Architecture Design for Unsupervised GAN-based Deep Learning using ReRAM F Chen, L Song, HH Li The 2019 on Great Lakes Symposium on VLSI (GLSVLSI), 423-428, 2019 | 7 | 2019 |
| Reboc: Accelerating Block-Circulant Neural Networks in ReRAM Y Wang, F Chen, L Song, CJR Shi, HH Li, Y Chen 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 6 | 2020 |
| QTrojan: A Circuit Backdoor Against Quantum Neural Networks C Chu, L Jiang, M Swany, F Chen IEEE International Conference on Acoustics, Speech, and Signal Processing …, 2023 | 5 | 2023 |
| RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution C Chu, F Chen, D Xu, Y Wang 2021 Great Lakes Symposium on VLSI (GLSVLSI), 235-240, 2021 | 5 | 2021 |
Yiran ChenJohn Cocke Distinguished Professor of Electrical and Computer Engineering, Duke UniversityVerified email at duke.edu
