Weiwen Jiang
Title
Cited by
Cited by
Year
Accuracy vs. efficiency: Achieving both through fpga-implementation aware neural architecture search
W Jiang, X Zhang, EHM Sha, L Yang, Q Zhuge, Y Shi, J Hu
(Best Paper Nomination) Proceedings of the 56th Annual Design Automation …, 2019
792019
Hardware/software co-exploration of neural architectures
W Jiang, L Yang, EHM Sha, Q Zhuge, S Gu, S Dasgupta, Y Shi, J Hu
(Best Paper Nomination) IEEE Transactions on Computer-Aided Design of …, 2020
582020
A new design of in-memory file system based on file virtual address framework
EHM Sha, X Chen, Q Zhuge, L Shi, W Jiang
IEEE Transactions on Computers 65 (10), 2959-2972, 2016
532016
Achieving super-linear speedup across multi-fpga for real-time dnn inference
W Jiang, EHM Sha, X Zhang, L Yang, Q Zhuge, Y Shi, J Hu
(Best Paper Nomination @ CODES+ISSS'19) ACM Transactions on Embedded …, 2019
412019
On neural architecture search for resource-constrained hardware platforms
Q Lu, W Jiang, X Xu, Y Shi, J Hu
arXiv preprint arXiv:1911.00105, 2019
382019
Co-exploration of neural architectures and heterogeneous asic accelerator designs targeting multiple tasks
L Yang, Z Yan, M Li, H Kwon, L Lai, T Krishna, V Chandra, W Jiang, Y Shi
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
372020
Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
362016
Device-circuit-architecture co-exploration for computing-in-memory neural accelerators
W Jiang, Q Lou, Z Yan, L Yang, J Hu, XS Hu, Y Shi
IEEE Transactions on Computers 70 (4), 595-605, 2020
322020
FoToNoC: A folded torus-like network-on-chip based many-core systems-on-chip in the dark silicon era
L Yang, W Liu, W Jiang, M Li, P Chen, EHM Sha
IEEE Transactions on Parallel and Distributed Systems 28 (7), 1905-1918, 2016
322016
Heterogeneous fpga-based cost-optimal design for timing-constrained cnns
W Jiang, EHM Sha, Q Zhuge, L Yang, X Chen, J Hu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
242018
Standing on the shoulders of giants: Hardware and neural architecture co-search with hot start
W Jiang, L Yang, S Dasgupta, J Hu, Y Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
232020
Optimizing data placement for reducing shift operations on domain wall memories
X Chen, EHM Sha, Q Zhuge, P Dai, W Jiang
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
232015
Thermal-aware task mapping on dynamically reconfigurable network-on-chip based multiprocessor system-on-chip
W Liu, L Yang, W Jiang, L Feng, N Guan, W Zhang, N Dutt
IEEE Transactions on Computers 67 (12), 1818-1834, 2018
212018
Efficient data placement for improving data access performance on domain-wall memory
X Chen, EHM Sha, Q Zhuge, CJ Xue, W Jiang, Y Wang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
212016
Co-exploring neural architecture and network-on-chip design for real-time artificial intelligence
L Yang, W Jiang, W Liu, HM Edwin, Y Shi, J Hu
(Best Paper Nomination) 2020 25th Asia and South Pacific Design Automation …, 2020
192020
Designing an efficient persistent in-memory file system
EHM Sha, X Chen, Q Zhuge, L Shi, W Jiang
2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA), 1-6, 2015
192015
Nass: Optimizing secure inference via neural architecture search
S Bian, W Jiang, Q Lu, Y Shi, T Sato
arXiv preprint arXiv:2001.11854, 2020
162020
When neural architecture search meets hardware implementation: from hardware awareness to co-design
X Zhang, W Jiang, Y Shi, J Hu
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 25-30, 2019
162019
FoToNoC: A hierarchical management strategy based on folded torus-like network-on-chip for dark silicon many-core systems
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 725-730, 2016
152016
A unified framework for designing high performance in-memory and hybrid memory file systems
X Chen, EHM Sha, Q Zhuge, W Jiang, J Chen, J Chen, J Xu
Journal of Systems Architecture 68, 51-64, 2016
132016
The system can't perform the operation now. Try again later.
Articles 1–20