Jiale Liang
Jiale Liang
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Phase change memory
HSP Wong, S Raoux, SB Kim, J Liang, JP Reifenberg, B Rajendran, ...
Proceedings of the IEEE 98 (12), 2201-2227, 2010
Cross-point memory array without cell selectors—Device characteristics and data storage pattern dependencies
J Liang, HSP Wong
IEEE Transactions on Electron Devices 57 (10), 2531-2538, 2010
Monitoring oxygen movement by Raman spectroscopy of resistive random access memory with a graphene-inserted electrode
H Tian, HY Chen, B Gao, S Yu, J Liang, Y Yang, D Xie, J Kang, TL Ren, ...
Nano letters 13 (2), 651-657, 2013
An ultra-low reset current cross-point phase change memory with carbon nanotube electrodes
J Liang, RGD Jeyasingh, HY Chen, HSP Wong
IEEE Transactions on Electron Devices 59 (4), 1155-1163, 2012
Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays
S Yu, J Liang, Y Wu, HSP Wong
Nanotechnology 21 (46), 465202, 2010
Effect of wordline/bitline scaling on the performance, energy consumption, and reliability of cross-point memory array
J Liang, S Yeh, SS Wong, HSP Wong
ACM Journal on Emerging Technologies in Computing Systems (JETC) 9 (1), 1-14, 2013
Analytical ballistic theory of carbon nanotube transistors: Experimental validation, device physics, parameter extraction, and performance projection
D Akinwande, J Liang, S Chong, Y Nishi, HSP Wong
Journal of Applied Physics 104 (12), 2008
A 1.4 µA reset current phase change memory cell with integrated carbon nanotube electrodes for cross-point memory application
J Liang, RGD Jeyasingh, HY Chen, HSP Wong
2011 Symposium on VLSI Technology-Digest of Technical Papers, 100-101, 2011
Carbon nanotube electronics-materials, devices, circuits, design, modeling, and performance projection
HSP Wong, S Mitra, D Akinwande, C Beasley, Y Chai, HY Chen, X Chen, ...
2011 International Electron Devices Meeting, 23.1. 1-23.1. 4, 2011
High performance germanium n-MOSFET with antimony dopant activation beyond 1×1020cm−3
G Thareja, J Liang, S Chopra, B Adams, N Patil, SL Cheng, A Nainani, ...
2010 International Electron Devices Meeting, 10.5. 1-10.5. 4, 2010
Scaling challenges for the cross-point resistive memory array to sub-10nm node-an interconnect perspective
J Liang, S Yeh, SS Wong, HSP Wong
2012 4th IEEE International Memory Workshop, 1-4, 2012
1D selection device using carbon nanotube FETs for high-density cross-point memory arrays
C Ahn, Z Jiang, CS Lee, HY Chen, J Liang, LS Liyanage, HSP Wong
IEEE Transactions on Electron Devices 62 (7), 2197-2204, 2015
Carrier density and quantum capacitance for semiconducting carbon nanotubes
J Liang, D Akinwande, HSP Wong
Journal of Applied Physics 104 (6), 2008
Recent progress of phase change memory (PCM) and resistive switching random access memory (RRAM)
HSP Wong, SB Kim, B Lee, MA Caldwell, J Liang, Y Wu, RGD Jeyasingh, ...
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE …, 0
The localized-SOI MOSFET as a candidate for analog/RF applications
H Xiao, R Huang, J Liang, H Liu, Y Tian, R Wang, Y Wang
IEEE Transactions on electron devices 54 (8), 1978-1984, 2007
Electrode/oxide interface engineering by inserting single-layer graphene: Application for HfOx-based resistive random access memory
HY Chen, H Tian, B Gao, S Yu, J Liang, J Kang, Y Zhang, TL Ren, ...
2012 International Electron Devices Meeting, 20.5. 1-20.5. 4, 2012
Phase change memory: Scaling and applications
R Jeyasingh, J Liang, MA Caldwell, D Kuzum, HSP Wong
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-7, 2012
Design optimization of structural parameters in double gate MOSFETs for RF applications
J Liang, H Xiao, R Huang, P Wang, Y Wang
Semiconductor science and technology 23 (5), 055019, 2008
Size limitation of cross-point memory array and its dependence on data storage pattern and device parameters
J Liang, HSP Wong
2010 IEEE International Interconnect Technology Conference, 1-3, 2010
Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (VT) lowering …
BA Anderson, A Bryant, J Liang, EJ Nowak
US Patent 8,698,245, 2014
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