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Meng-Fan Chang
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Cited by
Year
Biochemistry of signal transduction and regulation
G Krauss
John Wiley & Sons, 2006
801*2006
Neuro-inspired computing chips
W Zhang, B Gao, J Tang, P Yao, S Yu, MF Chang, HJ Yoo, H Qian, H Wu
Nature electronics 3 (7), 371-382, 2020
4932020
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors
WH Chen, KX Li, WY Lin, KH Hsu, PY Li, CH Yang, CX Xue, EY Yang, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 494-496, 2018
3282018
A 4Mb embedded SLC resistive-RAM macro with 7.2 ns read-write random-access time and 160ns MLC-access capability
SS Sheu, MF Chang, KF Lin, CW Wu, YS Chen, PF Chiu, CC Kuo, ...
2011 IEEE International Solid-State Circuits Conference, 200-202, 2011
2692011
24.1 A 1Mb multibit ReRAM computing-in-memory macro with 14.6 ns parallel MAC computing time for CNN based AI edge processors
CX Xue, WH Chen, JS Liu, JF Li, WY Lin, WE Lin, JH Wang, WC Wei, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 388-390, 2019
2622019
A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3 ns and 55.8 TOPS/W fully parallel product-sum operation for binary DNN edge processors
WS Khwa, JJ Chen, JF Li, X Si, EY Yang, X Sun, R Liu, PY Chen, Q Li, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 496-498, 2018
2502018
Memristive technologies for data storage, computation, encryption, and radio-frequency communication
M Lanza, A Sebastian, WD Lu, M Le Gallo, MF Chang, D Akinwande, ...
Science 376 (6597), eabj9979, 2022
2412022
24.5 A twin-8T SRAM computation-in-memory macro for multiple-bit CNN-based machine learning
X Si, JJ Chen, YN Tu, WH Huang, JH Wang, YC Chiu, WC Wei, SY Wu, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 396-398, 2019
2252019
33.2 A fully integrated analog ReRAM based 78.4 TOPS/W compute-in-memory chip with fully parallel MAC computing
Q Liu, B Gao, P Yao, D Wu, J Chen, Y Pang, W Zhang, Y Liao, CX Xue, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 500-502, 2020
2182020
15.4 A 22nm 2Mb ReRAM compute-in-memory macro with 121-28TOPS/W for multibit MAC computing for tiny AI edge devices
CX Xue, TY Huang, JS Liu, TW Chang, HY Kao, JH Wang, TW Liu, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 244-246, 2020
2002020
Differential sensing and TSV timing control scheme for 3D-IC
WC Wu, YH Chen, MF Chang
US Patent 7,969,193, 2011
1972011
16.4 An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications
YD Chih, PH Lee, H Fujiwara, YC Shih, CF Lee, R Naous, YL Chen, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 252-254, 2021
1922021
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors
WH Chen, C Dou, KX Li, WY Lin, PY Li, JH Huang, JH Wang, WC Wei, ...
Nature Electronics 2 (9), 420-428, 2019
1912019
Low store energy, low VDDmin, 8T2R nonvolatile latch and SRAM with vertical-stacked resistive memory (memristor) devices for low power mobile applications
PF Chiu, MF Chang, CW Wu, CH Chuang, SS Sheu, YS Chen, MJ Tsai
IEEE Journal of Solid-State Circuits 47 (6), 1483-1496, 2012
1822012
15.5 A 28nm 64Kb 6T SRAM computing-in-memory macro with 8b MAC operation for AI edge chips
X Si, YN Tu, WH Huang, JW Su, PJ Lu, JH Wang, TW Liu, SY Wu, R Liu, ...
2020 IEEE international solid-state circuits conference-(ISSCC), 246-248, 2020
1772020
A 130 mV SRAM with expanded write and read margins for subthreshold applications
MF Chang, SW Chang, PW Chou, WC Wu
IEEE Journal of Solid-State Circuits 46 (2), 520-529, 2010
1602010
Ambient energy harvesting nonvolatile processors: From circuit to system
Y Liu, Z Li, H Li, Y Wang, X Li, K Ma, S Li, MF Chang, S John, Y Xie, J Shu, ...
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
1592015
15.2 A 28nm 64Kb inference-training two-way transpose multibit 6T SRAM compute-in-memory macro for AI edge chips
JW Su, X Si, YC Chou, TW Chang, WH Huang, YN Tu, R Liu, PJ Lu, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 240-242, 2020
1542020
A twin-8T SRAM computation-in-memory unit-macro for multibit CNN-based AI edge processors
X Si, JJ Chen, YN Tu, WH Huang, JH Wang, YC Chiu, WC Wei, SY Wu, ...
IEEE Journal of Solid-State Circuits 55 (1), 189-202, 2019
1542019
In-memory learning with analog resistive switching memory: A review and perspective
Y Xi, B Gao, J Tang, A Chen, MF Chang, XS Hu, J Van Der Spiegel, ...
Proceedings of the IEEE 109 (1), 14-42, 2020
1442020
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