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Cheng-Chieh Huang
Cheng-Chieh Huang
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Title
Cited by
Cited by
Year
ATCache: Reducing DRAM cache latency via a small SRAM tag cache
CC Huang, V Nagarajan
Proceedings of the 23rd international conference on Parallel architectures …, 2014
1302014
Boomerang: A metadata-free architecture for control flow delivery
R Kumar, CC Huang, B Grot, V Nagarajan
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
722017
C3D: Mitigating the NUMA bottleneck via coherent DRAM caches
CC Huang, R Kumar, M Elver, B Grot, V Nagarajan
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
302016
Branch target buffer for a data processing apparatus
R Kumar, B Grot, V Nagarajan, CC Huang
US Patent 11,269,641, 2022
172022
Increasing cache capacity via critical-words-only cache
CC Huang, V Nagarajan
2014 IEEE 32nd International Conference on Computer Design (ICCD), 125-132, 2014
122014
DCA: a DRAM-cache-aware DRAM controller
CC Huang, V Nagarajan, A Joshi
SC'16: Proceedings of the International Conference for High Performance …, 2016
102016
Optimizing cache utilization in modern cache hierarchies
CC Huang
The University of Edinburgh, 2016
2016
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