| Learning structured sparsity in deep neural networks W Wen, C Wu, Y Wang, Y Chen, H Li Advances in neural information processing systems 29, 2016 | 2043 | 2016 |
| Terngrad: Ternary gradients to reduce communication in distributed deep learning W Wen, C Xu, F Yan, C Wu, Y Wang, Y Chen, H Li Advances in neural information processing systems 30, 2017 | 755 | 2017 |
| Pipelayer: A pipelined reram-based accelerator for deep learning L Song, X Qian, H Li, Y Chen 2017 IEEE international symposium on high performance computer architecture …, 2017 | 602 | 2017 |
| Spintronic memristor through spin-torque-induced magnetization motion X Wang, Y Chen, H Xi, H Li, D Dimitrov IEEE electron device letters 30 (3), 294-297, 2009 | 412 | 2009 |
| Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement X Dong, X Wu, G Sun, Y Xie, H Li, Y Chen 2008 45th ACM/IEEE Design Automation Conference, 554-559, 2008 | 404 | 2008 |
| Memristor crossbar-based neuromorphic computing system: A case study M Hu, H Li, Y Chen, Q Wu, GS Rose, RW Linderman IEEE transactions on neural networks and learning systems 25 (10), 1864-1878, 2014 | 344 | 2014 |
| Multi retention level STT-RAM cache designs with a dynamic refresh scheme Z Sun, X Bi, H Li, WF Wong, ZL Ong, X Zhu, W Wu proceedings of the 44th annual IEEE/ACM international symposium on …, 2011 | 313* | 2011 |
| Emerging non-volatile memories: Opportunities and challenges CJ Xue, Y Zhang, Y Chen, G Sun, JJ Yang, H Li Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011 | 225 | 2011 |
| DRG-cache: A data retention gated-ground cache for low power A Agarwal, H Li, K Roy Proceedings 2002 Design Automation Conference (IEEE Cat. No. 02CH37324), 473-478, 2002 | 221 | 2002 |
| Faster cnns with direct sparse convolutions and guided pruning J Park, S Li, W Wen, PTP Tang, H Li, Y Chen, P Dubey arXiv preprint arXiv:1608.01409, 2016 | 216* | 2016 |
| GraphR: Accelerating graph processing using ReRAM L Song, Y Zhuo, X Qian, H Li, Y Chen 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 206 | 2018 |
| Rescuing memristor-based neuromorphic design with high defects C Liu, M Hu, JP Strachan, H Li 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2017 | 196 | 2017 |
| Hardware realization of BSB recall function using memristor crossbar arrays M Hu, H Li, Q Wu, GS Rose DAC Design Automation Conference 2012, 498-503, 2012 | 195 | 2012 |
| A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement YCHL C206. Guangyu Sun, Yongsoo Joo, Yiran Chen, Dimin Niu, Yuan Xie the 16th International Symposium on High-Performance Computer Architecture …, 2010 | 176* | 2010 |
| A single-V/sub t/low-leakage gated-ground cache for deep submicron A Agarwal, H Li, K Roy IEEE Journal of Solid-state circuits 38 (2), 319-328, 2003 | 175 | 2003 |
| Generative poisoning attack method against neural networks C Yang, Q Wu, H Li, Y Chen arXiv preprint arXiv:1703.01340, 2017 | 172 | 2017 |
| RENO: A high-efficient reconfigurable neuromorphic computing accelerator design X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu, ... Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 159 | 2015 |
| Vortex: Variation-aware training for memristor X-bar B Liu, H Li, Y Chen, X Li, Q Wu, T Huang Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 150 | 2015 |
| Deterministic clock gating for microprocessor power reduction H Li, S Bhunia, Y Chen, TN Vijaykumar, K Roy The Ninth International Symposium on High-Performance Computer Architecture …, 2003 | 144 | 2003 |
| Coordinating filters for faster deep neural networks W Wen, C Xu, C Wu, Y Wang, Y Chen, H Li Proceedings of the IEEE International Conference on Computer Vision, 658-666, 2017 | 143 | 2017 |
Yiran ChenProfessor, Electrical and Computer Engineering, Duke UniversityVerified email at duke.edu
