Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching Y Kaneta, S Yoshizawa, S Minato, H Arimura, Y Miyanaga 2010 International Conference on Field-Programmable Technology, 21-28, 2010 | 32 | 2010 |
Constant time enumeration of bounded-size subtrees in trees and its application K Wasa, Y Kaneta, T Uno, H Arimura Computing and Combinatorics: 18th Annual International Conference, COCOON …, 2012 | 19 | 2012 |
Fast wavelet tree construction in practice Y Kaneta International Symposium on String Processing and Information Retrieval, 218-232, 2018 | 14 | 2018 |
High-speed string and regular expression matching on FPGA Y Kaneta, S Yoshizawa, S Minato, H Arimura Asia-Pacific Signal Information Processing Association Annu. Summit Conf., 2011 | 11 | 2011 |
Faster bit-parallel algorithms for unordered pseudo-tree matching and tree homeomorphism Y Kaneta, H Arimura, R Raman Journal of Discrete Algorithms 14, 119-135, 2012 | 9 | 2012 |
Fast bit-parallel matching for network and regular expressions Y Kaneta, S Minato, H Arimura String Processing and Information Retrieval: 17th International Symposium …, 2010 | 9 | 2010 |
Faster bit-parallel algorithms for unordered pseudo-tree matching and tree homeomorphism Y Kaneta, H Arimura International Workshop on Combinatorial Algorithms, 68-81, 2010 | 5 | 2010 |
Constant Time Enumeration of Subtrees with Exactly k Nodes in a Tree K Wasa, Y Kaneta, T Uno, H Arimura IEICE TRANSACTIONS on Information and Systems 97 (3), 421-430, 2014 | 4 | 2014 |
Efficient multiple regular expression matching on FPGAs based on extended SHIET-AND method Y Kaneta Proc. SASIMI'10, 401-406, 2010 | 3 | 2010 |
Towards evolution-based autonomy in large-scale systems D Anderson, P Harvey, Y Kaneta, P Papadopoulos, P Rodgers, M Roper Proceedings of the Genetic and Evolutionary Computation Conference Companion …, 2022 | 2 | 2022 |
Faster practical block compression for rank/select dictionaries Y Kaneta String Processing and Information Retrieval: 24th International Symposium …, 2017 | 1 | 2017 |
A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions Y Kaneta, S Yoshizawa, S Minato, H Arimura, Y Miyanaga IEICE TRANSACTIONS on Information and Systems 95 (7), 1847-1857, 2012 | 1 | 2012 |
Coordinated autonomous networks for remote synchronized video services with the autonomous mobility robots-prelude implementation HH Yamamoto, M Iwashita, N Kondo, L Wong, Y Kaneta, K Urano, ... 2023 International Conference on Artificial Intelligence in Information and …, 2023 | | 2023 |
Study on enabling video services with the use of an autonomous mobility robot connected to an autonomous network H Yamamoto, M Iwashita, Y Kaneta, L Wong, K Urano, T Yonezawa, ... IEICE Technical Report; IEICE Tech. Rep. 122 (171), 27-32, 2022 | | 2022 |
Bit string block encoder device, block decoder device, information processing device, program, block encoding method and block decoding method Y Kaneta US Patent 11,212,528, 2021 | | 2021 |
Fast Identification of Heavy Hitters by Cached and Packed Group Testing Y Kaneta, T Uno, H Arimura International Symposium on String Processing and Information Retrieval, 241-257, 2019 | | 2019 |
Efficient Pattern Matching for Acyclic Regular Expressions Y Kaneta, S Minato, H Arimura IEICE Technical Report; IEICE Tech. Rep. 110 (37), 23-29, 2010 | | 2010 |
An efficient hardware-oriented algorithm for regular expression matching based on parallel bit-distribution Y Kaneta, S Yoshizawa, S Minato, H Arimura, Y Miyanaga IEICE Technical Report; IEICE Tech. Rep. 109 (395), 131-136, 2010 | | 2010 |
Development of Interdisciplinary Research Environment by Collaboration of e-Learning and Remote FPGA J Kim, S Yoshizawa, Y Kaneta, S Minato, H Arimura, Y Miyanaga IEICE Technical Report; IEICE Tech. Rep. 109 (395), 31-34, 2010 | | 2010 |
Constant Time Enumeration of Bounded-Size Subtrees in Trees K WASA, Y KANETA, T UNO Discrete Appl. Math 65, 21-46, 1996 | | 1996 |