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Yuxuan Huang
Yuxuan Huang
PhD student at Tsinghua University
Verified email at mails.tsinghua.edu.cn - Homepage
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Cited by
Year
15.2 A 2.75-to-75.9 TOPS/W computing-in-memory NN processor supporting set-associate block-wise zero skipping and ping-pong CIM with simultaneous computation and weight updating
J Yue, X Feng, Y He, Y Huang, Y Wang, Z Yuan, M Zhan, J Liu, JW Su, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 238-240, 2021
442021
Dynamic channel modeling and OFDM system analysis for capacitive coupling body channel communication
W Sun, J Zhao, Y Huang, Y Sun, H Yang, Y Liu
IEEE Transactions on Biomedical Circuits and Systems 13 (4), 735-745, 2019
92019
A 4-Mbps 41-pJ/bit on-off keying transceiver for body-channel communication with enhanced auto loss compensation technique
J Zhao, J Mao, W Sun, Y Huang, Y Yang, H Yang, Y Liu
2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 173-176, 2019
82019
An auto loss compensation system for capacitive-coupled body channel communication
J Zhao, W Sun, J Mao, Y Huang, B Zhao, Y Liu, H Yang
IEEE transactions on biomedical circuits and systems 13 (4), 756-765, 2019
52019
Accuracy Optimization With the Framework of Non-Volatile Computing-In-Memory Systems
Y Huang, Y He, J Yue, H Yang, Y Liu
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (2), 518-529, 2021
22021
Investigation and Modeling of Multi-Node Body Channel Wireless Power Transfer
Y Huang, J Zhao, W Sun, H Yang, Y Liu
Sensors 20 (1), 156, 2019
22019
An Investigation on Inter-degeneration Effect in Body Channel Based Multi-node Wireless Power Transfer
Y Huang, J Zhao, W Sun, J Mao, H Yang, Y Liu
2018 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2018
22018
A non-volatile computing-in-memory framework with margin enhancement based CSA and offset reduction based ADC
Y Huang, Y He, J Yue, H Yang, Y Liu
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
12021
An energy-efficient flexible capacitive pressure sensing system
Y Huang, Q Zhao, X Tang, F Su, N Sun, H Yang, Y Liu
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
12020
Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array
W Sun, Y Huang, Q Zhao, F Qiao, TY Ho, X Guo, H Yang, Y Liu
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 645-650, 2018
12018
Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array
L Zhang, D Mu, Y Huang, J Wang, Y He, Y Li, L Liu, K Zou, H Yang, Y Liu
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
2022
An RRAM-Based Digital Computing-in-Memory Macro with Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree
Y He, J Yue, X Feng, Y Huang, H Jia, J Wang, L Zhang, W Sun, H Yang, ...
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
2022
C-RRAM: A Fully Input Parallel Charge-Domain RRAM-based Computing-in-Memory Design with High Tolerance for RRAM Variations
Y He, Y Huang, J Yue, W Sun, L Zhang, Y Liu
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 3279-3283, 2022
2022
Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems
Y Huang, Y He, J Wang, J Yue, L Zhang, K Zou, H Yang, Y Liu
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
2022
Sparsity-Aware Non-Volatile Computing-In-Memory Macro with Analog Switch Array and Low-Resolution Current-Mode ADC
Y Huang, Y He, J Yue, W Sun, H Yang, Y Liu
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 684-689, 2022
2022
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