| A stacked SONOS technology, up to 4 levels and 6nm crystalline nanowires, with gate-all-around or independent gates (Φ-Flash), suitable for full 3D integration A Hubert, E Nowak, K Tachi, V Maffini-Alvaro, C Vizioz, C Arvet, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 292 | 2009 |
| Fundamental variability limits of filament-based RRAM A Grossi, E Nowak, C Zambelli, C Pellissier, S Bernasconi, G Cibrario, ... 2016 IEEE International Electron Devices Meeting (IEDM), 4.7. 1-4.7. 4, 2016 | 118 | 2016 |
| In-memory and error-immune differential RRAM implementation of binarized deep neural networks M Bocquet, T Hirztlin, JO Klein, E Nowak, E Vianello, JM Portal, ... 2018 IEEE International Electron Devices Meeting (IEDM), 20.6. 1-20.6. 4, 2018 | 84 | 2018 |
| Demonstration of BEOL-compatible ferroelectric Hf0.5Zr0.5O2 scaled FeRAM co-integrated with 130nm CMOS for embedded NVM applications T Francois, L Grenouillet, J Coignus, P Blaise, C Carabasse, N Vaxelaire, ... 2019 IEEE International Electron Devices Meeting (IEDM), 15.7. 1-15.7. 4, 2019 | 81 | 2019 |
| Intrinsic fluctuations in vertical NAND flash memories E Nowak, JH Kim, HY Kwon, YG Kim, JS Sim, SH Lim, DS Kim, KH Lee, ... 2012 Symposium on VLSI Technology (VLSIT), 21-22, 2012 | 81 | 2012 |
| Experimental investigation of 4-kb RRAM arrays programming conditions suitable for TCAM A Grossi, E Vianello, C Zambelli, P Royer, JP Noel, B Giraud, L Perniola, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (12 …, 2018 | 68 | 2018 |
| Digital biologically plausible implementation of binarized neural networks with differential hafnium oxide resistive memory arrays T Hirtzlin, M Bocquet, B Penkovsky, JO Klein, E Nowak, E Vianello, ... Frontiers in neuroscience 13, 1383, 2020 | 59 | 2020 |
| Narrow Heater Bottom Electrode‐Based Phase Change Memory as a Bidirectional Artificial Synapse S La Barbera, DRB Ly, G Navarro, N Castellani, O Cueto, G Bourgeois, ... Advanced Electronic Materials 4 (9), 1800223, 2018 | 59 | 2018 |
| Resistive RAM endurance: Array-level characterization and correction techniques targeting deep learning applications A Grossi, E Vianello, MM Sabry, M Barlas, L Grenouillet, J Coignus, ... IEEE Transactions on Electron Devices 66 (3), 1281-1288, 2019 | 55 | 2019 |
| Outstanding bit error tolerance of resistive ram-based binarized neural networks T Hirtzlin, M Bocquet, JO Klein, E Nowak, E Vianello, JM Portal, ... 2019 IEEE International Conference on Artificial Intelligence Circuits and …, 2019 | 41 | 2019 |
| Liquid silicon: A nonvolatile fully programmable processing-in-memory processor with monolithically integrated ReRAM Y Zha, E Nowak, J Li IEEE Journal of Solid-State Circuits 55 (4), 908-919, 2020 | 37 | 2020 |
| Hybrid‐RRAM toward next generation of nonvolatile memory: coupling of oxygen vacancies and metal ions G Sassine, C Nail, P Blaise, B Sklenard, M Bernard, R Gassilloud, A Marty, ... Advanced Electronic Materials 5 (2), 1800658, 2019 | 37 | 2019 |
| High-density 3D monolithically integrated multiple 1T1R multi-level-cell for neural networks E Esmanhotto, L Brunet, N Castellani, D Bonnet, T Dalgaty, L Grenouillet, ... 2020 IEEE International Electron Devices Meeting (IEDM), 36.5. 1-36.5. 4, 2020 | 35 | 2020 |
| Advances in emerging memory technologies: From data storage to artificial intelligence G Molas, E Nowak Applied Sciences 11 (23), 11254, 2021 | 32 | 2021 |
| Nanosecond laser anneal (NLA) for Si-implanted HfO2 ferroelectric memories integrated in back-end of line (BEOL) L Grenouillet, T Francois, J Coignus, S Kerdiles, N Vaxelaire, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 32 | 2020 |
| Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications G Sassine, C Nail, L Tillie, DA Robayo, A Levisse, C Cagli, KE Hajjam, ... 2018 IEEE International Reliability Physics Symposium (IRPS), P-MY. 2-1-P-MY …, 2018 | 30 | 2018 |
| Experimental demonstration of short and long term synaptic plasticity using OxRAM multi k-bit arrays for reliable detection in highly noisy input data T Werner, E Vianello, O Bichler, A Grossi, E Nowak, JF Nodin, B Yvert, ... 2016 IEEE International Electron Devices Meeting (IEDM), 16.6. 1-16.6. 4, 2016 | 29 | 2016 |
| Resistive memories (RRAM) variability: Challenges and solutions G Molas, G Sassine, C Nail, DA Robayo, JF Nodin, C Cagli, J Coignus, ... ECS Transactions 86 (3), 35, 2018 | 28 | 2018 |
| Role of synaptic variability in resistive memory-based spiking neural networks with unsupervised learning DRB Ly, A Grossi, C Fenouillet-Beranger, E Nowak, D Querlioz, ... Journal of Physics D: Applied Physics 51 (44), 444002, 2018 | 26 | 2018 |
| In-depth investigation of programming and reading operations in RRAM cells integrated with Ovonic Threshold Switching (OTS) selectors M Alayan, E Vianello, G Navarro, C Carabasse, S La Barbera, A Verdy, ... 2017 IEEE International Electron Devices Meeting (IEDM), 2.3. 1-2.3. 4, 2017 | 26 | 2017 |
barbara de salvoCEA LETIVerified email at cea.fr
