| Design of FPGA-based circuits using hierarchical finite state machines D Sklārova, VA Sklārov, A Sudnitsõn TUT Press, 2012 | 113 | 2012 |
| Parallel FPGA-based implementation of recursive sorting algorithms D Mihhailov, V Sklyarov, I Skliarova, A Sudnitson 2010 International Conference on Reconfigurable Computing and FPGAs, 121-126, 2010 | 35 | 2010 |
| Implementation in FPGA of address-based data sorting V Sklyarov, I Skliarova, D Mihhailov, A Sudnitson 2011 21st International Conference on Field Programmable Logic and …, 2011 | 34 | 2011 |
| Hardware/software co-design for programmable systems-on-chip V Sklyarov, I Skliarova, J Silva, A Rjabov, A Sudnitson, C Cardoso Software Co-design for Programmable Systems-on-Chip, 2014 | 31 | 2014 |
| Analysis and comparison of attainable hardware acceleration in all programmable systems-on-chip V Sklyarov, I Skliarova, J Silva, A Sudnitson 2015 Euromicro Conference on Digital System Design, 345-352, 2015 | 22 | 2015 |
| Hardware implementation of recursive algorithms D Mihhailov, V Sklyarov, I Skliarova, A Sudnitson 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 225-228, 2010 | 15 | 2010 |
| Using SAT-based techniques in low power state assignment A Sagahyroon, FA Aloul, A Sudnitson Journal of Circuits, Systems, and Computers 20 (08), 1605-1618, 2011 | 14 | 2011 |
| High-performance information processing in distributed computing systems V Sklyarov, A Rjabov, I Skliarova, A Sudnitson International Journal of Innovative Computing, Information and Control 12 (1 …, 2016 | 13 | 2016 |
| Fast matrix covering in all programmable systems-on-chip V Sklyarov, I Skliarova, A Rjabov, A Sudnitson Elektronika ir Elektrotechnika 20 (5), 150-153, 2014 | 13 | 2014 |
| Teaching Digital RT-Level Self-Test Using a Java Applet S Devadze, A Jutman, A Sudnitson, R Ubar, HD Wuttke 20th IEEE Conference NORCHIP, 11-12, 2002 | 12 | 2002 |
| Partition search for FSM low power synthesis/А. Sudnitson A Sudnitson Fourth Intern. Conf. Computer-Aided Design of Discrete Devices, CAD DD, 14-16, 2001 | 12 | 2001 |
| Interactions of Zynq-7000 devices with general purpose computers through PCI-express: A case study A Rjabov, A Sudnitson, V Sklyarov, I Skliarova 2016 18th Mediterranean Electrotechnical Conference (MELECON), 1-4, 2016 | 10 | 2016 |
| Zynq-based system for extracting sorted subsets from large data sets V Sklyarov, I Skliarova, A Rjabov, A Sudnitson Informacije MIDEM 45 (2), 142-152, 2015 | 10 | 2015 |
| Methodology and international collaboration in teaching reconfigurable systems V Sklyarov, I Skliarova, A Sudnitson Proceedings of the 2012 IEEE Global Engineering Education Conference (EDUCON …, 2012 | 10 | 2012 |
| FPGA-based systems in information and communication V Sklyarov, I Skliarova, A Sudnitson 2011 5th international conference on application of information and …, 2011 | 10 | 2011 |
| Hardware implementation of recursive sorting algorithms D Mihhailov, V Sklyarov, I Skliarova, A Sudnitson 2011 International Conference on Electronic Devices, Systems and …, 2011 | 8 | 2011 |
| FPGA platform based digital design education D Mihhailov, M Kruus, A Sudnitson Proceedings of the 9th International Conference on Computer Systems and …, 2008 | 8 | 2008 |
| Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems. V Sklyarov, I Skliarova, A Rjabov, A Sudnitson Proceedings of the Estonian Academy of Sciences 66 (3), 2017 | 7 | 2017 |
| Processing sorted subsets in a multi-level reconfigurable computing system A Rjabov, V Sklyarov, I Skliarova, A Sudnitson Elektronika ir Elektrotechnika 21 (2), 30-33, 2015 | 7 | 2015 |
| FPGA-based accelerators for parallel data sort V Sklyarov, I Skliarova, A Sudnitson Applied Computer Systems 16 (1), 53-63, 2014 | 7 | 2014 |
Iouliia SkliarovaUniversity of Aveiro/IEETAVerified email at ua.pt
