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Sreenivas Subramoney
Sreenivas Subramoney
Verified email at intel.com
Title
Cited by
Cited by
Year
Bypass and insertion algorithms for exclusive last-level caches
J Gaur, M Chaudhuri, S Subramoney
Proceedings of the 38th annual international symposium on Computer …, 2011
1492011
Prefetch injection based on hardware monitoring and object metadata
AR Adl-Tabatabai, RL Hudson, MJ Serrano, S Subramoney
ACM SIGPLAN Notices 39 (6), 267-276, 2004
932004
Introducing hierarchy-awareness in replacement and bypass algorithms for last-level caches
M Chaudhuri, J Gaur, N Bashyam, S Subramoney, J Nuzman
Proceedings of the 21st international conference on Parallel architectures …, 2012
912012
Density tradeoffs of non-volatile memory as a replacement for SRAM based last level cache
K Korgaonkar, I Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
682018
Pythia: A customizable hardware prefetching framework using online reinforcement learning
R Bera, K Kanellopoulos, A Nori, T Shahroodi, S Subramoney, O Mutlu
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
592021
Method and system for improving the concurrency and parallelism of mark-sweep-compact garbage collection
S Subramoney, R Hudson
US Patent App. 10/793,707, 2005
582005
A survey of deep learning on cpus: opportunities and co-optimizations
S Mittal, P Rajput, S Subramoney
IEEE Transactions on Neural Networks and Learning Systems 33 (10), 5095-5115, 2021
552021
Method and system performing concurrently mark-sweep garbage collection invoking garbage collection thread to track and mark live objects in heap block using bit vector
S Subramoney, R Hudson
US Patent 7,197,521, 2007
502007
Dspatch: Dual spatial pattern prefetcher
R Bera, AV Nori, O Mutlu, S Subramoney
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
492019
Method for using cache prefetch feature to improve garbage collection algorithm
S Subramoney, RL Hudson
US Patent 6,662,274, 2003
452003
Look-up table based energy efficient processing in cache support for neural network acceleration
AK Ramanathan, GS Kalsi, S Srinivasa, TM Chandran, KR Pillai, OJ Omer, ...
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
422020
Criticality aware tiered cache hierarchy: A fundamental relook at multi-level cache hierarchies
AV Nori, J Gaur, S Rai, S Subramoney, H Wang
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
402018
SeGraM: A universal hardware accelerator for genomic sequence-to-graph and sequence-to-sequence mapping
DS Cali, K Kanellopoulos, J Lindegger, Z Bingöl, GS Kalsi, Z Zuo, ...
Proceedings of the 49th Annual International Symposium on Computer …, 2022
352022
Dynamic performance monitoring-based approach to memory management
S Subramoney, R Hudson, M Serrano, AR Adl-Tabatabai
US Patent 7,490,117, 2009
322009
Base-victim compression: An opportunistic cache compression architecture
J Gaur, AR Alameldeen, S Subramoney
ACM SIGARCH Computer Architecture News 44 (3), 317-328, 2016
302016
Cryptographic capability computing
M LeMay, J Rakshit, S Deutsch, DM Durham, S Ghosh, A Nori, J Gaur, ...
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
292021
Efficient management of last-level caches in graphics processors for 3d scene rendering workloads
J Gaur, R Srinivasan, S Subramoney, M Chaudhuri
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
292013
Machine learned machines: Adaptive co-optimization of caches, cores, and on-chip network
R Jain, PR Panda, S Subramoney
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 253-256, 2016
262016
Twig: Profile-guided btb prefetching for data center applications
TA Khan, N Brown, A Sriraman, NK Soundararajan, R Kumar, J Devietti, ...
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
232021
Cycles to recycle: garbage collection to the IA-64
RL Hudson, JE Moss, S Subramoney, W Washburn
Proceedings of the 2nd international symposium on Memory management, 101-110, 2000
232000
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