Chin Hau Hoo
Title
Cited by
Cited by
Year
An area-efficient partially reconfigurable crossbar switch with low reconfiguration delay
CH Hoo, A Kumar
22nd International Conference on Field Programmable Logic and Applications …, 2012
252012
ParaLaR: A parallel FPGA router based on Lagrangian relaxation
CH Hoo, A Kumar, Y Ha
2015 25th International Conference on Field Programmable Logic and …, 2015
192015
ParaDRo: A parallel deterministic router based on spatial partitioning and scheduling
CH Hoo, A Kumar
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
132018
ParaDiMe: A distributed memory FPGA router based on speculative parallelism and path encoding
CH Hoo, A Kumar
2017 IEEE 25th Annual International Symposium on Field-Programmable Custom …, 2017
132017
A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm
CH Hoo, Y Ha, A Kumar
2013 23rd International Conference on Field programmable Logic and …, 2013
92013
ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning
CH Hoo, Y Ha, A Kumar
2016 26th International Conference on Field Programmable Logic and …, 2016
62016
Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology
W Zhao, Y Ha, CH Hoo, AB Alvarez
International Symposium on Low Power Electronics and Design (ISLPED), 323-328, 2013
42013
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Articles 1–7