| A low-power high-speed hybrid multi-threshold full adder design in CNFET technology M Maleknejad, S Mohammadi, SM Mirhosseini, K Navi, HR Naji, ... Journal of Computational Electronics 17, 1257-1267, 2018 | 13 | 2018 |
| New RTD-based general threshold gate topologies and application to three-input XOR logic gates SM Mirhoseini, MJ Sharifi, D Bahrepour Journal of Electrical and Computer Engineering 2010, 1-7, 2010 | 12 | 2010 |
| A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo Multiplier SM Mirhosseini, AS Molahosseini, M Hosseinzadeh, L Sousa, P Martins IEEE Transactions on Circuits and Systems II: Express Briefs 64 (7), 817-821, 2016 | 11 | 2016 |
| A CNFET-based PVT-tolerant hybrid majority logic 4: 2 compressor design for high speed energy-efficient applications M Maleknejad, SM Mirhosseini, S Mohammadi Microprocessors and Microsystems, 104031, 2021 | 5 | 2021 |
| New three-input XOR and xnor gates based on mobile and application to a full adder SM Mirhoseini, MJ Sharifi, D Bahrepour International Journal of Recent Trends in Engineering 2 (5), 234, 2009 | 2 | 2009 |
| Rethinking reverse converter design: From algorithms to hardware components AS Molahosseini, AAE Zarandi, SM Mirhosseini, M Hosseinzadeh 2014 International Symposium on Integrated Circuits (ISIC), 444-447, 2014 | 1 | 2014 |
| Research Article New RTD-Based General Threshold Gate Topologies and Application to Three-Input XOR Logic Gates SM Mirhoseini, MJ Sharifi, D Bahrepour | | 2010 |
| New three-input XOR and XNOR gates based on Generalized Threshold Gates using RTDs SM Mirhoseini, MJ Sharifi, D Bahrepour 2009 2nd International Conference on Adaptive Science & Technology (ICAST), 9-13, 2009 | | 2009 |
| Special Session, ISIC 2014, Residue Number Systems: Modern Design Techniques and Applications AS Molahosseini, AAE Zarandi, SM Mirhosseini, M Hosseinzadeh | | |
Mehdi HosseinzadehAssistant Professor, Gachon University, Seoul, KoreaVerified email at gachon.ac.kr
