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Assaf Ben-Bassat
Assaf Ben-Bassat
Intel Principal Engineer
Verified email at intel.com
Title
Cited by
Cited by
Year
A 2 GHz 244 fs-resolution 1.2 ps-peak-INL edge interpolator-based digital-to-time converter in 28 nm CMOS
S Sievert, O Degani, A Ben-Bassat, R Banin, A Ravi, W Thomann, ...
IEEE Journal of Solid-State Circuits 51 (12), 2992-3004, 2016
792016
A 1x2 MIMO Multi-Band CMOS Transceiver with an Integrated Front-End in 90nm CMOS for 802.11 a/g/n WLAN Applications
O Degani, M Ruberto, E Cohen, Y Eilat, B Jann, F Cossoy, N Telzhensky, ...
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
632008
A fully integrated 27-dBm dual-band all-digital polar transmitter supporting 160 MHz for Wi-Fi 6 applications
A Ben-Bassat, S Gross, A Lane, A Nazimov, B Khamaisi, E Solomon, ...
IEEE Journal of Solid-State Circuits 55 (12), 3414-3425, 2020
312020
Dual digital to time converter (DTC) based differential correlated double sampling DTC calibration
A Ben-Bassat, A Ravi, O Degani
US Patent 9,520,890, 2016
142016
Calibration of dynamic error in high resolution digital-to-time converters
A Ravi, O Degani, R Banin, A Ben-Bassat
US Patent 9,735,952, 2017
132017
Dual-band CMOS transceiver with highly integrated front-end for 450Mb/s 802.11 n systems
S Gross, T Maimon, F Cossoy, M Ruberto, G Normatov, N Telzhensky, ...
2010 IEEE Radio Frequency Integrated Circuits Symposium, 431-434, 2010
132010
A 16nm,+ 28dBm dual-band all-digital polar transmitter based on 4-core digital PA for Wi-Fi6E applications
B Khamaisi, D Ben-Haim, A Nazimov, A Ben-Bassat, S Gross, N Shay, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 324-326, 2022
122022
Synchronizing phases between local LO generation circuits
A Ben-Bassat
US Patent 9,054,855, 2015
102015
Multi-band multi-standard local oscillator generation for direct up/down conversion transceiver architectures supporting WiFi and WiMax bands in standard 45nm CMOS process
R Sadhwani, AB Bassat, AA Kidwai, S Rivel
2010 IEEE Radio Frequency Integrated Circuits Symposium, 149-152, 2010
102010
PLL lock time reduction
A Ben-Bassat
US Patent 7,595,698, 2009
62009
High frequency time interleaved digital to time converter (DTC)
S Zur, O Degani, R Banin, A Ben-Bassat
US Patent 9,577,684, 2017
52017
A fully integrated 802.11 n radio with 24GHz harmonic LO generation for low-cost, low power, multi-standard systems
R Sadhwani, A Ben-Bassat, R Banin, H Shang, B Jann, O Degani
2011 IEEE Radio Frequency Integrated Circuits Symposium, 1-4, 2011
52011
System for digitally controlled edge interpolator linearization
S Sievert, A Ben-Bassat, O Degani, R Banin
US Patent 9,407,245, 2016
32016
High order stimulated Brillouin scattering in single-mode fibers with strong feedback
A Ben-Bassat, A Gordon, B Fischer
arXiv preprint physics/0503048, 2005
32005
Apparatus for interpolating between a first signal edge and a second signal edge, a method for controlling such apparatus, and an interpolation cell for a digital-to-time converter
O Degani, R Banin, A Ben-Bassat, S Sievert
US Patent 10,110,245, 2018
12018
Binary stochastic time-to-digital converter and method
R Banin, A Ben-Bassat, E Shumaker, O Degani
US Patent 9,927,775, 2018
12018
Electronic circuitry, system, base station, mobile device and method
A Ben-Bassat, E Borokhovich, P Skliar
US Patent App. 18/458,063, 2024
2024
Apparatus, system and method of phase shifting
E Banin, R Banin, A Ravi, A Ben-Bassat, O Degani
US Patent App. 17/958,340, 2024
2024
Apparatus, system, and method of a multi-mode power amplifier
O Degani, NR Shay, A Ben-Bassat, L Zohar, Y Eilat
US Patent App. 17/957,011, 2024
2024
Dual Feedback Stacking Method for Increasing Digital Power Amplifier Supply Range
O Degani, A Ben-Bassat, Y Eilat, NR Shay, L Zohar
US Patent App. 17/705,641, 2023
2023
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