| VLSI implementation of deep neural network using integral stochastic computing A Ardakani, F Leduc-Primeau, N Onizawa, T Hanyu, WJ Gross IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (10 …, 2017 | 225 | 2017 |
| Method and system for decoding W Gross, S Hemati, S Mannor, A Naderi, F Leduc-Primeau US Patent 8,677,227, 2014 | 50 | 2014 |
| Faulty Gallager-B decoding with optimal message repetition F Leduc-Primeau, WJ Gross 2012 50th Annual Allerton Conference on Communication, Control, and …, 2012 | 42 | 2012 |
| Dithered belief propagation decoding F Leduc-Primeau, S Hemati, S Mannor, WJ Gross IEEE Transactions on Communications 60 (8), 2042-2047, 2012 | 38 | 2012 |
| Method and system for decoding W Gross, F Leduc-Primeau, S Hemati, S Mannor US Patent 8,898,537, 2014 | 34 | 2014 |
| A relaxed half-stochastic iterative decoder for LDPC codes F Leduc-Primeau, S Hemati, WJ Gross, S Mannor GLOBECOM 2009-2009 IEEE Global Telecommunications Conference, 1-6, 2009 | 26 | 2009 |
| Training modern deep neural networks for memory-fault robustness GB Hacene, F Leduc-Primeau, AB Soussia, V Gripon, F Gagnon 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 21 | 2019 |
| Unsupervised deep learning for massive MIMO hybrid beamforming H Hojatian, J Nadal, JF Frigon, F Leduc-Primeau IEEE Transactions on Wireless Communications 20 (11), 7086-7099, 2021 | 20 | 2021 |
| Hardware implementation of FIR/IIR digital filters using integral stochastic computation A Ardakani, F Leduc-Primeau, WJ Gross 2016 IEEE International Conference on Acoustics, Speech and Signal …, 2016 | 20 | 2016 |
| Modeling and energy optimization of LDPC decoder circuits with timing violations F Leduc-Primeau, FR Kschischang, WJ Gross IEEE Transactions on Communications 66 (3), 932-946, 2018 | 19 | 2018 |
| A study of deep learning robustness against computation failures JC Vialatte, F Leduc-Primeau arXiv preprint arXiv:1704.05396, 2017 | 19 | 2017 |
| A relaxed min-sum LDPC decoder with simplified check nodes S Hemati, F Leduc-Primeau, WJ Gross IEEE Communications Letters 20 (3), 422-425, 2016 | 19 | 2016 |
| Energy optimization of LDPC decoder circuits with timing violations F Leduc-Primeau, FR Kschischang, WJ Gross Communications (ICC), 2015 IEEE International Conference on, 412-417, 2015 | 13 | 2015 |
| Relaxed half-stochastic belief propagation F Leduc-Primeau, S Hemati, S Mannor, WJ Gross IEEE transactions on communications 61 (5), 1648-1659, 2013 | 13 | 2013 |
| Fault-Tolerant Associative Memories Based on c-Partite Graphs F Leduc-Primeau, V Gripon, MG Rabbat, WJ Gross IEEE Transactions on Signal Processing 64 (4), 829-841, 2016 | 12* | 2016 |
| Finite-length quasi-synchronous LDPC decoders F Leduc-Primeau, WJ Gross 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 11 | 2016 |
| A 9.52 dB NCG FEC scheme and 162 b/Cycle low-complexity product decoder architecture C Condo, P Giard, F Leduc-Primeau, G Sarkis, WJ Gross IEEE Transactions on Circuits and Systems I: Regular Papers 65 (4), 1420-1431, 2017 | 9 | 2017 |
| Stall pattern avoidance in polynomial product codes C Condo, F Leduc-Primeau, G Sarkis, P Giard, WJ Gross 2016 IEEE Global Conference on Signal and Information Processing (GlobalSIP …, 2016 | 9 | 2016 |
| High-throughput LDPC decoding using the RHS algorithm F Leduc-Primeau, AJ Raymond, P Giard, K Cushon, C Thibeault, ... Proceedings of the 2012 Conference on Design and Architectures for Signal …, 2012 | 8 | 2012 |
| Layerwise noise maximisation to train low-energy deep neural networks S Henwood, F Leduc-Primeau, Y Savaria 2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020 | 7 | 2020 |
Saied HematiAssociate Professor, Electrical Engineering Department, Linköping UniversityVerified email at liu.se
