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Rei Ueno
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Highly Efficient Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design
R Ueno, N Homma, Y Sugawara, Y Nogami, T Aoki
International Workshop on Cryptographic Hardware and Embedded Systems, 63-80, 2015
372015
A high throughput/gate AES hardware architecture by compressing encryption and decryption datapaths
R Ueno, S Morioka, N Homma, T Aoki
International conference on cryptographic hardware and embedded systems, 538-558, 2016
352016
Toward more efficient DPA-resistant AES hardware architecture based on threshold implementation
R Ueno, N Homma, T Aoki
International Workshop on Constructive Side-Channel Analysis and Secure …, 2017
322017
Curse of re-encryption: A generic power/em analysis on post-quantum kems
R Ueno, K Xagawa, Y Tanaka, A Ito, J Takahashi, N Homma
IACR Transactions on Cryptographic Hardware and Embedded Systems, 296-322, 2022
252022
Fault-injection attacks against NIST’s post-quantum cryptography round 3 KEM candidates
K Xagawa, A Ito, R Ueno, J Takahashi, N Homma
International Conference on the Theory and Application of Cryptology and …, 2021
162021
High throughput/gate AES hardware architectures based on datapath compression
R Ueno, S Morioka, N Miura, K Matsuda, M Nagata, S Bhasin, Y Mathieu, ...
IEEE Transactions on Computers 69 (4), 534-548, 2019
152019
Efficient fuzzy extractors based on ternary debiasing method for biased physically unclonable functions
M Suzuki, R Ueno, N Homma, T Aoki
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 616-629, 2018
142018
Multiple-valued debiasing for physically unclonable functions and its application to fuzzy extractors
M Suzuki, R Ueno, N Homma, T Aoki
International Workshop on Constructive Side-Channel Analysis and Secure …, 2017
132017
Machine learning and hardware security: Challenges and opportunities-invited talk
F Regazzoni, S Bhasin, AA Pour, I Alshaer, F Aydin, A Aysu, V Beroulle, ...
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-6, 2020
112020
Imbalanced data problems in deep learning-based side-channel attacks: analysis and solution
A Ito, K Saito, R Ueno, N Homma
IEEE Transactions on Information Forensics and Security 16, 3790-3802, 2021
92021
A systematic design of tamper-resistant galois-field arithmetic circuits based on threshold implementation with (d+ 1) input shares
R Ueno, N Homma, T Aoki
2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 136-141, 2017
92017
System for automatic generation of parallel multipliers over galois fields
Y Sugawara, R Ueno, N Homma, T Aoki
2015 IEEE International Symposium on Multiple-Valued Logic, 54-59, 2015
92015
Highly efficient GF ( 2 8 ) inversion circuit based on hybrid GF representations
R Ueno, N Homma, Y Nogami, T Aoki
Journal of Cryptographic Engineering 9 (2), 101-113, 2019
72019
Tackling biased PUFs through biased masking: A debiasing method for efficient fuzzy extractor
R Ueno, M Suzuki, N Homma
IEEE Transactions on Computers 68 (7), 1091-1104, 2019
72019
On masked galois-field multiplication for authenticated encryption resistant to side channel analysis
H Oshida, R Ueno, N Homma, T Aoki
International Workshop on Constructive Side-Channel Analysis and Secure …, 2018
72018
Unified hardware for high-throughput AES-based authenticated encryptions
S Sawataishi, R Ueno, N Homma
IEEE Transactions on Circuits and Systems II: Express Briefs 67 (9), 1604-1608, 2020
62020
Practical side-channel based model extraction attack on tree-based machine learning algorithm
D Jap, V Yli-Mäyry, A Ito, R Ueno, S Bhasin, N Homma
International Conference on Applied Cryptography and Network Security, 93-105, 2020
52020
High throughput/gate FN-based hardware architectures for AES-OTR
R Ueno, N Homma, T Iida, K Minematsu
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2019
52019
Formal approach for verifying Galois field arithmetic circuits of higher degrees
R Ueno, N Homma, Y Sugawara, T Aoki
IEEE Transactions on Computers 66 (3), 431-442, 2016
52016
Formal design of Galois-field arithmetic circuits based on polynomial ring representation
R Ueno, N Homma, Y Sugawara, T Aoki
2015 IEEE International Symposium on Multiple-Valued Logic, 48-53, 2015
52015
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Articles 1–20