Arindam Basu
Arindam Basu
Associate Professor of EEE at NTU
Verified email at ntu.edu.sg - Homepage
Title
Cited by
Cited by
Year
A floating-gate-based field-programmable analog array
A Basu, S Brink, C Schlottmann, S Ramakrishnan, C Petre, S Koziol, ...
IEEE Journal of Solid-State Circuits 45 (9), 1781-1794, 2010
1532010
Synergistic gating of electro‐iono‐photoactive 2D chalcogenide neuristors: coexistence of hebbian and homeostatic synaptic metaplasticity
RA John, F Liu, NA Chien, MR Kulkarni, C Zhu, Q Fu, A Basu, Z Liu, ...
Advanced Materials 30 (25), 1800220, 2018
1352018
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena
S Brink, S Nease, P Hasler, S Ramakrishnan, R Wunderlich, A Basu, ...
IEEE, 0
107
A 128-channel extreme learning machine-based neural decoder for brain machine interfaces
Y Chen, E Yao, A Basu
IEEE transactions on biomedical circuits and systems 10 (3), 679-692, 2015
782015
A charge-based low-power high-SNR capacitive sensing interface circuit
SY Peng, MS Qureshi, PE Hasler, A Basu, FL Degertekin
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (7), 1863-1872, 2008
752008
A charge-based low-power high-SNR capacitive sensing interface circuit
SY Peng, MS Qureshi, PE Hasler, A Basu, FL Degertekin
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (7), 1863-1872, 2008
752008
Neural dynamics in reconfigurable silicon
A Basu, S Ramakrishnan, C Petre, S Koziol, S Brink, PE Hasler
IEEE Transactions on Biomedical Circuits and Systems 4 (5), 311-319, 2010
742010
Silicon spiking neurons for hardware implementation of extreme learning machines
A Basu, S Shuo, H Zhou, MH Lim, GB Huang
Neurocomputing 102, 125-134, 2013
702013
Nullcline-based design of a silicon neuron
A Basu, PE Hasler
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (11), 2938-2947, 2010
622010
Ionotronic Halide Perovskite Drift‐Diffusive Synapses for Low‐Power Neuromorphic Computation
RA John, N Yantara, YF Ng, G Narasimman, E Mosconi, D Meggiolaro, ...
Advanced Materials 30 (51), 1805454, 2018
572018
Low-power, adaptive neuromorphic systems: Recent progress and future directions
A Basu, J Acharya, T Karnik, H Liu, H Li, JS Seo, C Song
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (1), 6-27, 2018
562018
RASP 2.8: A new generation of floating-gate based field programmable analog array
A Basu, CM Twigg, S Brink, P Hasler, C Petre, S Ramakrishnan, S Koziol, ...
2008 IEEE Custom Integrated Circuits Conference, 213-216, 2008
482008
Hardware and software infrastructure for a family of floating-gate based FPAAs
S Koziol, C Schlottmann, A Basu, S Brink, C Petre, B Degnan, ...
Proceedings of 2010 IEEE international symposium on circuits and systems …, 2010
472010
Low-power discrete Fourier transform for OFDM: A programmable analog approach
S Suh, A Basu, C Schlottmann, PE Hasler, JR Barry
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (2), 290-298, 2010
432010
A low-power, compact, adaptive logarithmic transimpedance amplifier operating over seven decades of current
A Basu, RW Robucci, PE Hasler
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (10), 2167-2177, 2007
432007
Liquid state machine with dendritically enhanced readout for low-power, neuromorphic VLSI implementations
S Roy, A Banerjee, A Basu
IEEE transactions on biomedical circuits and systems 8 (5), 681-695, 2014
422014
Improved margin multi-class classification using dendritic neurons with morphological learning
S Hussain, SC Liu, A Basu
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2640-2643, 2014
422014
An extreme learning machine-based neuromorphic tactile sensing system for texture recognition
M Rasouli, Y Chen, A Basu, SL Kukreja, NV Thakor
IEEE transactions on biomedical circuits and systems 12 (2), 313-325, 2018
402018
Ultralow power dual-gated subthreshold oxide neuristors: an enabler for higher order neuronal temporal correlations
RA John, N Tiwari, C Yaoyi, Ankit, N Tiwari, M Kulkarni, A Nirmal, ...
ACS nano 12 (11), 11263-11273, 2018
392018
Low power probabilistic floating point multiplier design
A Gupta, S Mandavalli, VJ Mooney, KV Ling, A Basu, H Johan, ...
2011 IEEE Computer Society Annual Symposium on VLSI, 182-187, 2011
382011
The system can't perform the operation now. Try again later.
Articles 1–20