Mateus Grellert
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Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design
B Silveira, G Paim, B Abreu, M Grellert, CM Diniz, EAC da Costa, S Bampi
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3126-3137, 2017
Motion vectors merging: low complexity prediction unit decision heuristic for the inter-prediction of HEVC encoders
F Sampaio, S Bampi, M Grellert, L Agostini, J Mattos
2012 IEEE international conference on multimedia and expo, 657-662, 2012
Hardware-software collaborative complexity reduction scheme for the emerging HEVC intra encoder
MUK Khan, M Shafique, M Grellert, J Henkel
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 125-128, 2013
Rate-distortion and complexity comparison of HEVC and VVC video encoders
Í Siqueira, G Correa, M Grellert
2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2020
Fast coding unit partition decision for HEVC using support vector machines
M Grellert, B Zatt, S Bampi, LA da Silva Cruz
IEEE Transactions on Circuits and Systems for Video Technology 29 (6), 1741-1753, 2018
An adaptive workload management scheme for HEVC encoding
M Grellert, M Shafique, MUK Khan, L Agostini, JCB Mattos, J Henkel
2013 IEEE international conference on image processing, 1850-1854, 2013
Low cost and high throughput multiplierless design of a 16 point 1-D DCT of the new HEVC video coding standard
R Jeske, JC de Souza, G Wrege, R Conceição, M Grellert, J Mattos, ...
2012 VIII Southern Conference on Programmable Logic, 1-6, 2012
Complexity-scalable HEVC encoding
M Grellert, B Zatt, S Bampi
Picture Coding Symposium (PCS), 2017
Logic synthesis meets machine learning: Trading exactness for generalization
S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
Rate-distortion and energy performance of HEVC and H. 264/AVC encoders: A comparative analysis
E Monteiro, M Grellert, S Bampi, B Zatt
2015 IEEE international symposium on circuits and systems (ISCAS), 1278-1281, 2015
A multilevel data reuse scheme for Motion Estimation and its VLSI design
M Grellert, F Sampaio, JCB Mattos, L Agostini
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 583-586, 2011
Fast logic optimization using decision trees
BA De Abreu, A Berndt, IS Campos, C Meinhardt, JT Carvalho, M Grellert, ...
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding
B Silveira, B Abreu, G Paim, M Grellert, R Ferreira, C Diniz, E Costa, ...
2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017
Complexity control of HEVC encoders targeting real-time constraints
M Grellert, B Zatt, M Shafique, S Bampi, J Henkel
Journal of Real-Time Image Processing, pp 1–20, 2016
Hardware architecture for the regular interpolation filter of the AV1 video coding standard
D Freitas, R da Silva, Í Siqueira, CM Diniz, RAL Reis, M Grellert
2020 28th European Signal Processing Conference (EUSIPCO), 560-564, 2021
Approximate interpolation filters for the fractional motion estimation in HEVC encoders and their VLSI design
R Da Silva, Í Siqueira, M Grellert
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 1-6, 2019
Memory bandwidth reduction in video coding systems through context adaptive lossless reference frame compression
D Silveira, G Sanchez, M Grellert, V Possani, L Agostini
2012 VIII Southern Conference on Programmable Logic, 1-6, 2012
Learning-based complexity reduction and scaling for HEVC encoders
M Grellert, S Bampi, G Correa, B Zatt, LA da Silva Cruz
2018 IEEE International Conference on Acoustics, Speech and Signal …, 2018
Accuracy and size trade-off of a cartesian genetic programming flow for logic optimization
A Berndt, IS Campos, B Lima, M Grellert, JT Carvalho, C Meinhardt, ...
2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2021
Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding
G Paim, GM Santana, BA Abreu, LMG Rocha, M Grellert, EAC da Costa, ...
Journal of Real-Time Image Processing 17 (5), 1735-1754, 2020
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