| Optimal voltage allocation techniques for dynamically variable voltage processors WC Kwon, T Kim ACM Transactions on Embedded Computing Systems (TECS) 4 (1), 211-230, 2005 | 307 | 2005 |
| Checklist of Korean insects MK Paek, JM Hwang, KS Jung, TW Kim, MC Kim, YJ Lee, YB Cho, ... Nature & Ecology> Academic Series 2, 598, 2010 | 195 | 2010 |
| DC–DC converter-aware power management for low-power embedded systems Y Choi, N Chang, T Kim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 164 | 2007 |
| A Scheduling Algorithm for Conditional Resource Sharing. T Kim, JWS Liu, CL Liu ICCAD, 84-87, 1991 | 117 | 1991 |
| Circuit optimization using carry-save-adder cells T Kim, W Jao, S Tjiang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1998 | 105 | 1998 |
| A scheduling algorithm for conditional resource sharing/spl minus/a hierarchical reduction approach T Kim, N Yonezawa, JWS Liu, CL Liu IEEE transactions on computer-aided design of integrated circuits and …, 1994 | 93 | 1994 |
| Low-power bus encoding with crosstalk delay elimination CG Lyuh, T Kim IEE proceedings-computers and digital techniques 153 (2), 93-100, 2006 | 91 | 2006 |
| Profile-based optimal intra-task voltage scheduling for hard real-time applications J Seo, T Kim, KS Chung Proceedings of the 41st annual Design Automation Conference, 87-92, 2004 | 73 | 2004 |
| Utilization of multiport memories in data path synthesis T Kim, CL Liu Proceedings of the 30th international Design Automation Conference, 298-302, 1993 | 71 | 1993 |
| Arithmetic optimization using carry-save-adders T Kim, W Jao, S Tjiang Proceedings of the 35th annual Design Automation Conference, 433-438, 1998 | 69 | 1998 |
| Memory access scheduling and binding considering energy minimization in multi-bank memory systems CG Lyuh, T Kim Proceedings of the 41st annual Design Automation Conference, 81-86, 2004 | 67 | 2004 |
| Clock tree embedding for 3D ICs TY Kim, T Kim 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 486-491, 2010 | 64 | 2010 |
| Timing variation-aware high-level synthesis J Jung, T Kim 2007 IEEE/ACM International Conference on Computer-Aided Design, 424-428, 2007 | 54 | 2007 |
| Clock tree synthesis for TSV-based 3D IC designs TY Kim, T Kim ACM Transactions on Design Automation of Electronic Systems (TODAES) 16 (4 …, 2011 | 53 | 2011 |
| Clock tree synthesis with pre-bond testability for 3D stacked IC designs TY Kim, T Kim Proceedings of the 47th Design Automation Conference, 723-728, 2010 | 48 | 2010 |
| High-level synthesis for low power based on network flow method CG Lyuh, T Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (3), 364-375, 2003 | 47 | 2003 |
| Bus-invert coding for low-power I/O-a decomposition approach S Hong, U Narayanan, KS Chung, T Kim Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat …, 2000 | 46 | 2000 |
| An optimal allocation of carry-save-adders in arithmetic circuits J Um, T Kim IEEE Transactions on Computers 50 (3), 215-233, 2001 | 43 | 2001 |
| Address assignment combined with scheduling in DSP code generation Y Choi, T Kim Proceedings of the 39th annual Design Automation Conference, 225-230, 2002 | 42 | 2002 |
| An integrated algorithm for memory allocation and assignment in high-level synthesis J Seo, T Kim, PR Panda Proceedings of the 39th annual Design Automation Conference, 608-611, 2002 | 41 | 2002 |
