| SMARTS: Accelerating microarchitecture simulation via rigorous statistical sampling RE Wunderlich, TF Wenisch, B Falsafi, JC Hoe Proceedings of the 30th annual international symposium on Computer …, 2003 | 796 | 2003 |
| SimFlex: statistical sampling of computer system simulation TF Wenisch, RE Wunderlich, M Ferdman, A Ailamaki, B Falsafi, JC Hoe IEEE Micro 26 (4), 18-31, 2006 | 452 | 2006 |
| Multi-bit error tolerant caches using two-dimensional error coding J Kim, N Hardavellas, K Mai, B Falsafi, J Hoe 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007 | 374 | 2007 |
| Single-chip heterogeneous computing: Does the future include custom logic, FPGAs, and GPGPUs? ES Chung, PA Milder, JC Hoe, K Mai 2010 43rd annual IEEE/ACM international symposium on microarchitecture, 225-236, 2010 | 343 | 2010 |
| Dual use of superscalar datapath for transient-fault detection and recovery J Ray, JC Hoe, B Falsafi Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture …, 2001 | 291 | 2001 |
| Data reorganization in memory using 3D-stacked DRAM B Akin, F Franchetti, JC Hoe Proc. ACM/IEEE International Symposium on Computer Architecture (ISCA), 131-143, 2015 | 253 | 2015 |
| CONNECT: re-examining conventional wisdom for designing nocs in the context of FPGAs MK Papamichael, JC Hoe Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012 | 251 | 2012 |
| Fingerprinting: Bounding soft-error detection latency and bandwidth JC Smolens, BT Gold, J Kim, B Falsafi, JC Hoe, AG Nowatzyk ACM SIGOPS Operating Systems Review 38 (5), 224-234, 2004 | 247 | 2004 |
| RAMP: Research accelerator for multiple processors J Wawrzynek, D Patterson, M Oskin, SL Lu, C Kozyrakis, JC Hoe, D Chiou, ... IEEE micro 27 (2), 46-57, 2007 | 230 | 2007 |
| CoRAM: an in-fabric memory architecture for FPGA-based computing ES Chung, JC Hoe, K Mai Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011 | 209 | 2011 |
| Reunion: Complexity-effective multicore redundancy JC Smolens, BT Gold, B Falsafi, JC Hoe 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006 | 206 | 2006 |
| Simflex: A fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture N Hardavellas, S Somogyi, TF Wenisch, RE Wunderlich, S Chen, J Kim, ... ACM SIGMETRICS Performance Evaluation Review 31 (4), 31-34, 2004 | 198 | 2004 |
| GraphGen: An FPGA framework for vertex-centric graph computation E Nurvitadhi, G Weisz, Y Wang, S Hurkat, M Nguyen, JC Hoe, JF Martínez, ... 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014 | 164 | 2014 |
| Computer generation of hardware for linear digital signal processing transforms P Milder, F Franchetti, JC Hoe, M Püschel ACM Transactions on Design Automation of Electronic Systems (TODAES) 17 (2 …, 2012 | 159 | 2012 |
| A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing Q Zhu, B Akin, HE Sumbul, F Sadi, JC Hoe, L Pileggi, F Franchetti 2013 IEEE international 3D systems integration conference (3DIC), 1-7, 2013 | 150 | 2013 |
| SPIRAL: Extreme performance portability F Franchetti, TM Low, DT Popovici, RM Veras, DG Spampinato, ... Proceedings of the IEEE 106 (11), 1935-1968, 2018 | 130 | 2018 |
| Commercial antivirus software effectiveness: an empirical study O Sukwong, HS Kim, JC Hoe Computer 3 (44), 63-70, 2011 | 129 | 2011 |
| ProtoFlex: Towards scalable, full-system multiprocessor simulations using FPGAs ES Chung, MK Papamichael, E Nurvitadhi, JC Hoe, K Mai, B Falsafi ACM Transactions on Reconfigurable Technology and Systems (TRETS) 2 (2), 1-32, 2009 | 121 | 2009 |
| Hardware synthesis from term rewriting systems JC Hoe, Arvind VLSI: Systems on a chip, 595-619, 2000 | 120 | 2000 |
| 3D-stacked memory-side acceleration: Accelerator and system design Q Guo, N Alachiotis, B Akin, F Sadi, G Xu, TM Low, L Pileggi, JC Hoe, ... 2nd Workshop on Near Data Processing, WONDP 2014, 2014 | 115 | 2014 |
Babak FalsafiProfessor of Computer Science, EPFLVerified email at epfl.ch
