| Architecture exploration for ambient energy harvesting nonvolatile processors K Ma, Y Zheng, S Li, K Swaminathan, X Li, Y Liu, J Sampson, Y Xie, ... 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 256 | 2015 |
| Ambient energy harvesting nonvolatile processors: From circuit to system Y Liu, Z Li, H Li, Y Wang, X Li, K Ma, S Li, MF Chang, S John, Y Xie, J Shu, ... Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 145 | 2015 |
| Nonvolatile memory design based on ferroelectric FETs S George, K Ma, A Aziz, X Li, A Khan, S Salahuddin, MF Chang, S Datta, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 112 | 2016 |
| Sticker: A 0.41-62.1 TOPS/W 8Bit neural network processor with multi-sparsity compatible convolution arrays and online tuning acceleration for fully connected layers Z Yuan, J Yue, H Yang, Z Wang, J Li, Y Yang, Q Guo, X Li, MF Chang, ... 2018 IEEE symposium on VLSI circuits, 33-34, 2018 | 102 | 2018 |
| 14.3 A 65nm computing-in-memory-based CNN processor with 2.9-to-35.8 TOPS/W system energy efficiency using dynamic-sparsity performance-scaling architecture and energy … J Yue, Z Yuan, X Feng, Y He, Z Zhang, X Si, R Liu, MF Chang, X Li, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 234-236, 2020 | 97 | 2020 |
| Tunnel FET RF rectifier design for energy harvesting applications H Liu, X Li, R Vaddi, K Ma, S Datta, V Narayanan IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (4 …, 2014 | 95 | 2014 |
| Pairwise coupled hybrid vanadium dioxide-MOSFET (HVFET) oscillators for non-boolean associative computing N Shukla, A Parihar, M Cotter, M Barth, X Li, N Chandramoorthy, H Paik, ... 2014 IEEE International Electron Devices Meeting, 28.7. 1-28.7. 4, 2014 | 86 | 2014 |
| Enabling energy-efficient nonvolatile computing with negative capacitance FET X Li, J Sampson, A Khan, K Ma, S George, A Aziz, SK Gupta, ... IEEE Transactions on Electron Devices 64 (8), 3452-3458, 2017 | 82 | 2017 |
| Write disturb in ferroelectric FETs and its implication for 1T-FeFET AND memory arrays K Ni, X Li, JA Smith, M Jerry, S Datta IEEE Electron Device Letters 39 (11), 1656-1659, 2018 | 77 | 2018 |
| Nonvolatile processor architecture exploration for energy-harvesting applications K Ma, X Li, S Li, Y Liu, JJ Sampson, Y Xie, V Narayanan IEEE Micro 35 (5), 32-40, 2015 | 72 | 2015 |
| 15.2 A 2.75-to-75.9 TOPS/W computing-in-memory NN processor supporting set-associate block-wise zero skipping and ping-pong CIM with simultaneous computation and weight updating J Yue, X Feng, Y He, Y Huang, Y Wang, Z Yuan, M Zhan, J Liu, JW Su, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 238-240, 2021 | 71 | 2021 |
| A comprehensive model for ferroelectric fet capturing the key behaviors: Scalability, variation, stochasticity, and accumulation S Deng, G Yin, W Chakraborty, S Dutta, S Datta, X Li, K Ni 2020 IEEE symposium on VLSI technology, 1-2, 2020 | 58 | 2020 |
| Advancing nonvolatile computing with nonvolatile NCFET latches and flip-flops X Li, S George, K Ma, WY Tsai, A Aziz, J Sampson, SK Gupta, MF Chang, ... IEEE Transactions on Circuits and Systems I: Regular Papers 64 (11), 2907-2919, 2017 | 57 | 2017 |
| Analysis of DIBL effect and negative resistance performance for NCFET based on a compact SPICE model Y Liang, X Li, SK Gupta, S Datta, V Narayanan IEEE Transactions on Electron Devices 65 (12), 5525-5529, 2018 | 56 | 2018 |
| Incidental computing on IoT nonvolatile processors K Ma, X Li, J Li, Y Liu, Y Xie, J Sampson, MT Kandemir, V Narayanan Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 54 | 2017 |
| RF-powered systems using steep-slope devices X Li, UD Heo, K Ma, V Narayanan, H Liu, S Datta 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 73-76, 2014 | 51 | 2014 |
| Design of nonvolatile SRAM with ferroelectric FETs for energy-efficient backup and restore X Li, K Ma, S George, WS Khwa, J Sampson, S Gupta, Y Liu, MF Chang, ... IEEE Transactions on Electron Devices 64 (7), 3037-3040, 2017 | 47 | 2017 |
| Device circuit co design of FEFET based logic for low voltage processors S George, A Aziz, X Li, MS Kim, S Datta, J Sampson, S Gupta, ... 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 649-654, 2016 | 46 | 2016 |
| STICKER: An energy-efficient multi-sparsity compatible accelerator for convolutional neural networks in 65-nm CMOS Z Yuan, Y Liu, J Yue, Y Yang, J Wang, X Feng, J Zhao, X Li, H Yang IEEE Journal of Solid-State Circuits 55 (2), 465-477, 2019 | 45 | 2019 |
| Compact 3-D-SRAM memory with concurrent row and column data access capability using sequential monolithic 3-D integration S Srinivasa, X Li, MF Chang, J Sampson, SK Gupta, V Narayanan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (4), 671-683, 2018 | 40 | 2018 |
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State UniversityVerified email at cse.psu.edu
