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Paolo Ienne
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ShiDianNao: Shifting vision processing closer to the sensor
Z Du, R Fasthuber, T Chen, P Ienne, L Li, T Luo, X Feng, Y Chen, ...
Proceedings of the 42nd annual international symposium on computer …, 2015
12252015
Mobile robot miniaturisation: A tool for investigation in control algorithms
F Mondada, E Franzi, P Ienne
Experimental Robotics III: The 3rd International Symposium, Kyoto, Japan …, 1994
7431994
Automatic application-specific instruction-set extensions under microarchitectural constraints
K Atasu, L Pozzi, P Ienne
Proceedings of the 40th annual Design Automation Conference, 256-261, 2003
4622003
Variable latency speculative addition: A new paradigm for arithmetic circuit design
AK Verma, P Brisk, P Ienne
Proceedings of the conference on Design, automation and test in Europe, 1250 …, 2008
4182008
Exact and approximate algorithms for the extension of embedded processor instruction sets
L Pozzi, K Atasu, P Ienne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
2672006
Customizable embedded processors: design technologies and applications
P Ienne, R Leupers
Elsevier, 2006
2032006
Wear Unleveling: Improving {NAND} Flash Lifetime by Balancing Page Endurance
X Jimenez, D Novo, P Ienne
12th USENIX Conference on File and Storage Technologies (FAST 14), 47-59, 2014
1402014
Seamless hardware-software integration in reconfigurable computing systems
M Vuletić, L Pozzi, P Ienne
IEEE Design & Test of Computers 22 (2), 102-113, 2005
1262005
Dynamically scheduled high-level synthesis
L Josipović, R Ghosal, P Ienne
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
1142018
A first step towards automatic application of power analysis countermeasures
AG Bayrak, F Regazzoni, P Brisk, FX Standaert, P Ienne
Proceedings of the 48th Design Automation Conference, 230-235, 2011
1142011
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
L Pozzi, P Ienne
Proceedings of the 2005 international conference on Compilers, architectures …, 2005
1102005
Automatic instruction set extension and utilization for embedded processors
A Peymandoust, L Pozzi, P Ienne, G De Micheli
Proceedings IEEE International Conference on Application-Specific Systems …, 2003
1102003
Sleuth: Automated verification of software power analysis countermeasures
AG Bayrak, F Regazzoni, D Novo, P Ienne
Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013
1012013
A robust self-calibrating transmission scheme for on-chip networks
F Worm, P Ienne, P Thiran, G De Micheli
IEEE Transactions on very large scale integration (VLSI) systems 13 (1), 126-139, 2005
1002005
Introduction of local memory elements in instruction set extensions
P Biswas, V Choudhary, K Atasu, L Pozzi, P Ienne, N Dutt
Proceedings of the 41st annual Design Automation Conference, 729-734, 2004
932004
Hardware system synthesis from domain-specific languages
N George, HJ Lee, D Novo, T Rompf, KJ Brown, AK Sujeeth, M Odersky, ...
2014 24th International Conference on Field Programmable Logic and …, 2014
922014
Efficient synthesis of compressor trees on FPGAs
H Parandeh-Afshar, P Brisk, P Ienne
2008 Asia and South Pacific Design Automation Conference, 138-143, 2008
912008
High performance comparison-based sorting algorithm on many-core GPUs
X Ye, D Fan, W Lin, N Yuan, P Ienne
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
902010
A design flow and evaluation framework for DPA-resistant instruction set extensions
F Regazzoni, A Cevrero, FX Standaert, S Badel, T Kluter, P Brisk, ...
Cryptographic Hardware and Embedded Systems-CHES 2009: 11th International …, 2009
832009
Virtualized execution runtime for FPGA accelerators in the cloud
M Asiatici, N George, K Vipin, SA Fahmy, P Ienne
Ieee Access 5, 1900-1910, 2017
812017
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Articles 1–20