| A spiking neuromorphic design with resistive crossbar C Liu, B Yan, C Yang, L Song, Z Li, B Liu, Y Chen, H Li, Q Wu, H Jiang 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015 | 119 | 2015 |
| Compact model of subvolume MTJ and its design application at nanoscale technology nodes Y Zhang, B Yan, W Kang, Y Cheng, JO Klein, Y Zhang, Y Chen, W Zhao IEEE Transactions on Electron Devices 62 (6), 2048-2055, 2015 | 74 | 2015 |
| A memristor crossbar based computing engine optimized for high speed and accuracy C Liu, Q Yang, B Yan, J Yang, X Du, W Zhu, H Jiang, Q Wu, M Barnell, ... 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 110-115, 2016 | 41 | 2016 |
| Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System Perspectives B Yan, B Li, X Qiao, CX Xue, MF Chang, Y Chen, H Li Advanced Intelligent Systems 1 (7), 1900068, 2019 | 33 | 2019 |
| A closed-loop design to enhance weight stability of memristor based neural network chips B Yan, JJ Yang, Q Wu, Y Chen, HH Li 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 541 …, 2017 | 31 | 2017 |
| RRAM-based spiking nonvolatile computing-in-memory processing engine with precision-configurable in situ nonlinear activation B Yan, Q Yang, WH Chen, KT Chang, JW Su, CH Hsu, SH Li, HY Lee, ... 2019 Symposium on VLSI Technology, T86-T87, 2019 | 30 | 2019 |
| Giant spin hall effect (GSHE) logic design for low power application Y Zhang, B Yan, W Wu, H Li, Y Chen 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 25 | 2015 |
| A neuromorphic ASIC design using one-selector-one-memristor crossbar B Yan, AM Mahmoud, JJ Yang, Q Wu, Y Chen, HH Li 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1390-1393, 2016 | 23 | 2016 |
| Challenges of memristor based neuromorphic computing system B Yan, Y Chen, H Li Science China Information Sciences 61 (6), 1-3, 2018 | 16 | 2018 |
| An overview of in-memory processing with emerging non-volatile memory for data-intensive applications B Li, B Yan, H Li Proceedings of the 2019 on Great Lakes Symposium on VLSI, 381-386, 2019 | 15 | 2019 |
| A high-speed robust nvm-tcam design using body bias feedback B Yan, Z Li, Y Zhang, J Yang, H Li, W Zhao, PCF Chia Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 69-74, 2015 | 15 | 2015 |
| An overview on memristor crossabr based neuromorphic circuit and architecture Z Li, C Liu, Y Wang, B Yan, C Yang, J Yang, H Li 2015 IFIP/IEEE International Conference on Very Large Scale Integration …, 2015 | 14 | 2015 |
| Understanding the trade-offs of device, circuit and application in ReRAM-based neuromorphic computing systems B Yan, C Liu, X Liu, Y Chen, H Li 2017 IEEE International Electron Devices Meeting (IEDM), 11.4. 1-11.4. 4, 2017 | 13 | 2017 |
| Low-power neuromorphic speech recognition engine with coarse-grain sparsity S Yin, D Kadetotad, B Yan, C Song, Y Chen, C Chakrabarti, J Seo 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 111-114, 2017 | 11 | 2017 |
| ReTransformer: ReRAM-based processing-in-memory architecture for transformer acceleration X Yang, B Yan, H Li, Y Chen Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 10 | 2020 |
| Build reliable and efficient neuromorphic design with memristor technology B Li, B Yan, C Liu, H Li Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 10 | 2019 |
| Lattice: an adc/dac-less reram-based processing-in-memory architecture for accelerating deep convolution neural networks Q Zheng, Z Wang, Z Feng, B Yan, Y Cai, R Huang, Y Chen, CL Yang, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 8 | 2020 |
| Spin-hall assisted STT-RAM design and discussion E Eken, I Bayram, Y Zhang, B Yan, W Wu, HH Li, Y Chen Proceedings of the 18th System Level Interconnect Prediction Workshop, 1-4, 2016 | 8 | 2016 |
| Persistent and nonpersistent error optimization for STT-RAM cell design Y Zhang, B Yan, X Wang, Y Chen IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 7 | 2016 |
| Giant Spin-Hall assisted STT-RAM and logic design E Eken, I Bayram, Y Zhang, B Yan, W Wu, HH Li, Y Chen Integration 58, 253-261, 2017 | 6 | 2017 |
Hai (Helen) LiClare Boothe Luce Professor of Electrical and Computer EngineeringVerified email at duke.edu
