Bonan Yan
Bonan Yan
Other namesBo-Nan Yan
Assistant Professor, Peking University, Duke PhD' 20
Verified email at - Homepage
Cited by
Cited by
A spiking neuromorphic design with resistive crossbar
C Liu, B Yan, C Yang, L Song, Z Li, B Liu, Y Chen, H Li, Q Wu, H Jiang
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
Compact model of subvolume MTJ and its design application at nanoscale technology nodes
Y Zhang, B Yan, W Kang, Y Cheng, JO Klein, Y Zhang, Y Chen, W Zhao
IEEE Transactions on Electron Devices 62 (6), 2048-2055, 2015
A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation …
B Yan, JL Hsu, PC Yu, CC Lee, Y Zhang, W Yue, G Mei, Y Yang, Y Yang, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 188-190, 2022
ReTransformer: ReRAM-based processing-in-memory architecture for transformer acceleration
X Yang, B Yan, H Li, Y Chen
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
RRAM-based spiking nonvolatile computing-in-memory processing engine with precision-configurable in situ nonlinear activation
B Yan, Q Yang, WH Chen, KT Chang, JW Su, CH Hsu, SH Li, HY Lee, ...
2019 Symposium on VLSI Technology, T86-T87, 2019
Resistive memory‐based in‐memory computing: from device and large‐scale integration system perspectives
B Yan, B Li, X Qiao, CX Xue, MF Chang, Y Chen, H Li
Advanced Intelligent Systems 1 (7), 1900068, 2019
A memristor crossbar based computing engine optimized for high speed and accuracy
C Liu, Q Yang, B Yan, J Yang, X Du, W Zhu, H Jiang, Q Wu, M Barnell, ...
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 110-115, 2016
An overview of in-memory processing with emerging non-volatile memory for data-intensive applications
B Li, B Yan, H Li
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 381-386, 2019
A closed-loop design to enhance weight stability of memristor based neural network chips
B Yan, JJ Yang, Q Wu, Y Chen, HH Li
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 541 …, 2017
Lattice: An ADC/DAC-less ReRAM-based processing-in-memory architecture for accelerating deep convolution neural networks
Q Zheng, Z Wang, Z Feng, B Yan, Y Cai, R Huang, Y Chen, CL Yang, ...
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
Giant spin hall effect (GSHE) logic design for low power application
Y Zhang, B Yan, W Wu, H Li, Y Chen
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
A neuromorphic ASIC design using one-selector-one-memristor crossbar
B Yan, AM Mahmoud, JJ Yang, Q Wu, Y Chen, HH Li
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1390-1393, 2016
In‐memory realization of eligibility traces based on conductance drift of phase change memory for energy‐efficient reinforcement learning
Y Lu, X Li, B Yan, L Yan, T Zhang, Z Song, R Huang, Y Yang
Advanced Materials 34 (6), 2107811, 2022
Build reliable and efficient neuromorphic design with memristor technology
B Li, B Yan, C Liu, H Li
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
Understanding the trade-offs of device, circuit and application in ReRAM-based neuromorphic computing systems
B Yan, C Liu, X Liu, Y Chen, H Li
2017 IEEE International Electron Devices Meeting (IEDM), 11.4. 1-11.4. 4, 2017
Challenges of memristor based neuromorphic computing system
B Yan, Y Chen, H Li
Science China. Information Sciences 61 (6), 060425, 2018
ReSiPE: ReRAM-based single-spiking processing-in-memory engine
Z Li, B Yan, H Li
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
An overview on memristor crossabr based neuromorphic circuit and architecture
Z Li, C Liu, Y Wang, B Yan, C Yang, J Yang, H Li
2015 IFIP/IEEE International Conference on Very Large Scale Integration …, 2015
A high-speed robust NVM-TCAM design using body bias feedback
B Yan, Z Li, Y Zhang, J Yang, H Li, W Zhao, PCF Chia
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 69-74, 2015
VSDCA: A voltage sensing differential column architecture based on 1T2R RRAM array for computing-in-memory accelerators
Z Jing, B Yan, Y Yang, R Huang
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (10), 4028-4041, 2022
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