| Performance of inversion, accumulation, and junctionless mode n-type and p-type bulk silicon FinFETs with 3-nm gate length V Thirunavukkarasu, YR Jhan, YB Liu, YC Wu IEEE electron device letters 36 (7), 645-647, 2015 | 67 | 2015 |
| Performance evaluation of silicon and germanium ultrathin body (1 nm) junctionless field-effect transistor with ultrashort gate length (1 nm and 3 nm) YR Jhan, V Thirunavukkarasu, CP Wang, YC Wu IEEE Electron Device Letters 36 (7), 654-656, 2015 | 42 | 2015 |
| Analysis of Ge-Si heterojunction nanowire tunnel FET: impact of tunneling window of band-to-band tunneling model ED Kurniawan, SY Yang, V Thirunavukkarasu, YC Wu Journal of The Electrochemical Society 164 (11), E3354, 2017 | 36 | 2017 |
| Nano-electronic Simulation Software (NESS): a flexible nano-device simulation platform S Berrada, H Carrillo-Nunez, J Lee, C Medina-Bailon, T Dutta, O Badami, ... Journal of Computational Electronics 19, 1031-1046, 2020 | 30 | 2020 |
| Gate-all-around junctionless silicon transistors with atomically thin nanosheet channel (0.65 nm) and record sub-threshold slope (43 mV/dec) V Thirunavukkarasu, YR Jhan, YB Liu, ED Kurniawan, YR Lin, SY Yang, ... Applied Physics Letters 110 (3), 2017 | 29 | 2017 |
| The physical analysis on electrical junction of junctionless FET LC Chen, MS Yeh, YR Lin, KW Lin, MH Wu, V Thirunavukkarasu, YC Wu AIP Advances 7 (2), 2017 | 18 | 2017 |
| Characteristics of a novel poly-Si p-channel junctionless thin-film transistor with hybrid P/N-substrate YC Cheng, HB Chen, JJ Su, CS Shao, V Thirunavukkarasu, CY Chang, ... IEEE Electron Device Letters 36 (2), 159-161, 2014 | 12 | 2014 |
| Investigation of inversion, accumulation and junctionless mode bulk Germanium FinFETs V Thirunavukkarasu, J Lee, T Sadi, VP Georgiev, FA Lema, ... Superlattices and Microstructures 111, 649-655, 2017 | 9 | 2017 |
| Multiscale modeling of charge trapping in molecule based flash memories O Badami, T Sadi, V Georgiev, F Adamu-Lema, V Thirunavukkarasu, ... 2019 International Conference on Simulation of Semiconductor Processes and …, 2019 | 2 | 2019 |
| Ge-cap quantum-well bulk FinFET for 5 nm node CMOS integration ED Kurniawan, KH Peng, SY Yang, YY Yang, V Thirunavukkarasu, YH Lin, ... Japanese Journal of Applied Physics 57 (4S), 04FD17, 2018 | 2 | 2018 |
| Photoconduction Properties in Germanium Sulfide Nanosheets on Rigid and Flexible Substrates A Subramanian, V Thirunavukkarasu, RK Ulaganathan, R Sankar, ... 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2024 | | 2024 |
| Efficient Coupled-mode space based Non-Equilibrium Green’s Function Approach for Modeling Quantum Transport and Variability in Vertically Stacked SiNW FETs V Thirunavukkarasu, H Carrillo-Nunez, FD Alema, S Berrada, O Badami, ... 2019 International Conference on Simulation of Semiconductor Processes and …, 2019 | | 2019 |
| Characteristics of inversion, accumulation and junctionless mode silicon N-type and P-type bulk FinFETs with optimized 3-nm nano-fin structure V Thirunavukkarasu, YR Jhan, YB Liu, YC Wu 2015 Silicon Nanoelectronics Workshop (SNW), 1-2, 2015 | | 2015 |
