David L. Dill
David L. Dill
Professor, Emeritus, of Computer Science, Stanford University
Verified email at
Cited by
Cited by
A theory of timed automata
R Alur, DL Dill
Theoretical computer science 126 (2), 183-235, 1994
Symbolic Model Checking: 1020 states and beyond
JR Burch, EM Clarke, KL McMillan, DL Dill, LJ Hwang
Information and Computation 98 (2), 1992
Reluplex: An efficient SMT solver for verifying deep neural networks
G Katz, C Barrett, DL Dill, K Julian, MJ Kochenderfer
Computer Aided Verification: 29th International Conference, CAV 2017†…, 2017
Automata for modeling real-time systems
R Alur, D Dill
Automata, Languages and Programming: 17th International Colloquium Warwick†…, 1990
EXE: Automatically generating inputs of death
C Cadar, V Ganesh, PM Pawlowski, DL Dill, DR Engler
ACM Transactions on Information and System Security (TISSEC) 12 (2), 1-38, 2008
Model-checking for real-time systems
R Alur, C Courcoubetis, D Dill
[1990] Proceedings. Fifth Annual IEEE Symposium on Logic in Computer Science†…, 1990
Model-checking in dense real-time
R Alur, C Courcoubetis, D Dill
Information and computation 104 (1), 2-34, 1993
Timing assumptions and verification of finite-state concurrent systems
DL Dill
Automatic Verification Methods for Finite State Systems: International†…, 1990
A decision procedure for bit-vectors and arrays
V Ganesh, DL Dill
Computer Aided Verification: 19th International Conference, CAV 2007, Berlin†…, 2007
Symbolic model checking for sequential circuit verification
JR Burch, EM Clarke, DE Long, KL McMillan, DL Dill
IEEE Transactions on Computer-Aided Design of Integrated Circuits and†…, 1994
Trace theory for automatic hierarchical verification of speed-independent circuits
DL Dill
MIT press, 1989
Automatic verification of pipelined microprocessor control
JR Burch, DL Dill
Computer Aided Verification: 6th International Conference, CAV'94 Stanford†…, 1994
Better verification through symmetry
C Norris Ip, DL Dill
Formal methods in system design 9, 41-75, 1996
Sequential circuit verification using symbolic model checking
JR Burch, EM Clarke, KL McMillan, DL Dill
Proceedings of the 27th ACM/IEEE Design Automation Conference, 46-51, 1991
Protocol verification as a hardware design aid.
DL Dill, AJ Drexler, AJ Hu, CH Yang
ICCD 92, 522-525, 1992
The marabou framework for verification and analysis of deep neural networks
G Katz, DA Huang, D Ibeling, K Julian, C Lazarus, R Lim, P Shah, ...
Computer Aided Verification: 31st International Conference, CAV 2019, New†…, 2019
CMC: A pragmatic approach to model checking real code
M Musuvathi, DYW Park, A Chou, DR Engler, DL Dill
ACM SIGOPS Operating Systems Review 36 (SI), 75-88, 2002
The Mur ϕ verification system
DL Dill
Computer Aided Verification: 8th International Conference, CAV'96 New†…, 1996
Learning a SAT solver from single-bit supervision
D Selsam, M Lamm, B BŁnz, P Liang, L de Moura, DL Dill
arXiv preprint arXiv:1802.03685, 2018
Automated identification of stratifying signatures in cellular subpopulations
RV Bruggner, B Bodenmiller, DL Dill, RJ Tibshirani, GP Nolan
Proceedings of the National Academy of Sciences 111 (26), E2770-E2777, 2014
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