Arnab Biswas
Arnab Biswas
R&D Engineer at Infineon Technologies
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TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model
A Biswas, SS Dan, C Le Royer, W Grabinski, AM Ionescu
Microelectronic Engineering 98, 334-337, 2012
A steep-slope transistor combining phase-change and band-to-band-tunneling to achieve a sub-unity body factor
WA Vitale, EA Casu, A Biswas, T Rosca, C Alper, A Krammer, GV Luong, ...
Scientific reports 7 (1), 355, 2017
Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric
A Saeidi, A Biswas, AM Ionescu
Solid-State Electronics 124, 16-23, 2016
Investigation of Tunnel Field-Effect Transistors as a Capacitor-less Memory Cell
A Biswas, N Dagtekin, W Grabinski, A Bazigos, CL Royer, JM Hartmann, ...
Applied Physics Letters 104 (9), 092108, 2014
1T Capacitor-less DRAM cell based on asymmetric Tunnel FET design
A Biswas, A Ionescu
IEEE Journal of the Electron Devices Society, 2014
Hybrid phase-change—Tunnel FET (PC-TFET) switch with subthreshold swing< 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking
EA Casu, WA Vitale, N Oliva, T Rosca, A Biswas, C Alper, A Krammer, ...
2016 IEEE International Electron Devices Meeting (IEDM), 19.3. 1-19.3. 4, 2016
An innovative band-to-band tunneling analytical model and implications in compact modeling of tunneling-based devices
L De Michielis, N Dağtekin, A Biswas, L Lattanzio, L Selmi, M Luisier, ...
Applied Physics Letters 103 (12), 2013
Benchmarking of homojunction strained-Si NW tunnel FETs for basic analog functions
A Biswas, GV Luong, MF Chowdhury, C Alper, QT Zhao, F Udrea, S Mantl, ...
IEEE transactions on electron devices 64 (4), 1441-1448, 2017
Study of Fin-Tunnel FETs with doped pocket as Capacitor-less 1T DRAM
A Biswas, MA Ionescu
Proceedings of the SOI-3D-Subthreshold Microelectronics Technology Unified …, 2014
A novel extraction method and compact model for the steepness estimation of FDSOI TFET lateral junction
SS Dan, A Biswas, C Le Royer, W Grabinski, AM Ionescu
IEEE electron device letters 33 (2), 140-142, 2011
Method device and operation method of said device
A Biswas, N Dagtekin, MA Ionescu
US Patent App. 14/507,487, 2015
Compact modeling of DG-Tunnel FET for Verilog-A Implementation
A Biswas, L De Michielis, A Bazigos, AM Ionescu
IEEE European Solid State Device Research Conference (ESSDERC), 2015
A tunneling field-effect transistor exploiting internally combined band-to-band and barrier tunneling mechanisms
L Lattanzio, A Biswas, L De Michielis, AM Ionescu
Applied Physics Letters 98 (12), 2011
Conformal mapping based DC current model for double gate tunnel FETs
A Biswas, L De Michielis, C Alper, AM Ionescu
2014 15th International Conference on Ultimate Integration on Silicon (ULIS …, 2014
New tunnel-FET architecture with enhanced ION and improved Miller Effect for energy efficient switching
A Biswas, C Alper, L De Michielis, AM Ionescu
70th Device Research Conference, 131-132, 2012
Abrupt switch based on internally combined Band-To-Band and Barrier Tunneling mechanisms
L Lattanzio, L De Michielis, A Biswas, AM Ionescu
European Solid State Device Research Conference, 353-356, 2010
Single field effect transistor capacitor-less memory device and method of operating the same
A Biswas, N Dagtekin, MA Ionescu
US Patent 9,508,854, 2016
Comment on “Investigation of tunnel field-effect transistors as a capacitor-less memory cell”[Appl. Phys. Lett. 104, 092108 (2014)]
J Wan, A Zaslavsky, S Cristoloveanu
Applied Physics Letters 106 (1), 2015
Behavioral compact models of IGBTs and Si-diodes for data sheet simulations using a machine learning based calibration strategy
D Ludwig, G Alia, A Biswas, M Cotorogea
PCIM Europe digital days 2020; International Exhibition and Conference for …, 2020
A Capacitance-Voltage model for DG-TFET
A Biswas, AM Ionescu
Silicon Nanoelectronics Workshop, 2015
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