A 0.45–1 V fully-integrated distributed switched capacitor DC-DC converter with high density MIM capacitor in 22 nm tri-gate CMOS R Jain, BM Geuskens, ST Kim, MM Khellah, J Kulkarni, JW Tschanz, V De IEEE Journal of Solid-State Circuits 49 (4), 917-927, 2014 | 114 | 2014 |
A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14-nm tri-gate CMOS HK Krishnamurthy, V Vaidya, P Kumar, R Jain, S Weng, ST Kim, ... IEEE Journal of Solid-State Circuits 53 (1), 8-19, 2017 | 100 | 2017 |
Enabling wide autonomous DVFS in a 22 nm graphics execution core using a digitally controlled fully integrated voltage regulator ST Kim, YC Shih, K Mazumdar, R Jain, JF Ryan, C Tokunaga, ... IEEE Journal of Solid-State Circuits 51 (1), 18-30, 2015 | 87 | 2015 |
Switched Capacitor voltage regulator having multiple conversion ratios R Jain US Patent 8,089,788, 2012 | 55 | 2012 |
A 0.45–1V fully integrated reconfigurable switched capacitor step-down DC-DC converter with high density MIM capacitor in 22nm tri-gate CMOS R Jain, B Geuskens, M Khellah, S Kim, J Kulkarni, J Tschanz, V De 2013 Symposium on VLSI Circuits, C174-C175, 2013 | 43 | 2013 |
Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators YC Shih, K Mazumdar, ST Kim, R Jain, JW Tschanz, MM Khellah US Patent 10,698,432, 2020 | 41 | 2020 |
8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation ST Kim, YC Shih, K Mazumdar, R Jain, JF Ryan, C Tokunaga, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 39 | 2015 |
Dual-VCC 8T-bitcell SRAM array in 22nm tri-gate CMOS for energy-efficient operation across wide dynamic voltage range J Kulkarni, M Khellah, J Tschanz, B Geuskens, R Jain, S Kim, V De 2013 Symposium on VLSI Technology, C126-C127, 2013 | 38 | 2013 |
Switched capacitor voltage regulator with high efficiency over a wide voltage range L Huang, K Ravichandran, R Jain, TV Aldridge US Patent 8,423,800, 2013 | 37 | 2013 |
5.7 A graphics execution core in 22nm CMOS featuring adaptive clocking, selective boosting and state-retentive sleep C Tokunaga, JF Ryan, C Augustine, JP Kulkarni, YC Shih, ST Kim, R Jain, ... 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 36 | 2014 |
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS P Meinerzhagen, C Tokunaga, A Malavasi, V Vaidya, A Mendon, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 38-40, 2018 | 33 | 2018 |
A comprehensive analysis of hybrid phase-modulated converter with current-doubler rectifier and comparison with its center-tapped counterpart R Jain, N Mohan, R Ayyanar, R Button IEEE Transactions on Industrial Electronics 53 (6), 1870-1880, 2006 | 28 | 2006 |
Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22 nm tri-gate CMOS R Jain, ST Kim, V Vaidya, K Ravichandran, JW Tschanz, V De IEEE Journal of Solid-State Circuits 50 (8), 1809-1819, 2015 | 26 | 2015 |
Arnebins and antimicrobial activities of Arnebia hispidissima DC. cell cultures SC Jain, B Singh, R Jain Phytomedicine 6 (6), 474-476, 2000 | 25 | 2000 |
An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V} _ {\text {MIN}} $ Optimization PA Meinerzhagen, C Tokunaga, A Malavasi, V Vaidya, A Mendon, ... IEEE Journal of Solid-State Circuits 54 (1), 144-157, 2018 | 23 | 2018 |
Low dropout regulator with hysteretic control R Jain, YC Shih, V Vaidya US Patent 9,323,263, 2016 | 23 | 2016 |
A comparative study of intravenous nalbuphine HCl and tramadol HCl for post-operative pain relief following orthopaedic surgeries RN Solanki, ND Gosai, GM Joshi, BM Patel, HV Modi, R Jain Asian Pac J Health Sci 2 (1), 155-160, 2015 | 22 | 2015 |
A 200mA switched capacitor voltage regulator on 32nm CMOS and regulation schemes to enable DVFS R Jain, S Sanders Proceedings of the 2011 14th European Conference on Power Electronics and …, 2011 | 22 | 2011 |
Switched capacitor voltage regulator with high efficiency over a wide voltage range L Huang, K Ravichandran, R Jain, TV Aldridge US Patent 8,856,562, 2014 | 20 | 2014 |
NSF-ARPA workshop on visual information management systems," R Jain, A Pentland, D Petkovic Cambridge, MA, June, 1995 | 20 | 1995 |