| Semiconductor device and method of manufacturing semiconductor device Y Hayashi, N Inoue, K Kaneko US Patent 8,378,341, 2013 | 463 | 2013 |
| Nitrogen Ion Implantation into α‐SiC Epitaxial Layers T Kimoto, N Inoue physica status solidi (a) 162 (1), 263-276, 1997 | 126 | 1997 |
| Estimation of HRTFs on the horizontal plane using physical features T Nishino, N Inoue, K Takeda, F Itakura Applied Acoustics 68 (8), 897-908, 2007 | 118 | 2007 |
| Semiconductor device and method of manufacturing the semiconductor device M Ueki, N Inoue, Y Hayashi US Patent 8,558,334, 2013 | 99 | 2013 |
| DC magnetron sputtering method for manufacturing electrode of ferroelectric capacitor N Inoue, Y Hayashi US Patent 6,146,906, 2000 | 76 | 2000 |
| Semiconductor device and method of manufacturing semiconductor device Y Hayashi, N Inoue, K Kaneko US Patent 9,129,937, 2015 | 60 | 2015 |
| A novel BEOL transistor (BETr) with InGaZnO embedded in Cu-interconnects for on-chip high voltage I/Os in standard CMOS LSIs K Kaneko, N Inoue, S Saito, N Furutake, Y Hayashi 2011 Symposium on VLSI Technology-Digest of Technical Papers, 120-121, 2011 | 56 | 2011 |
| Semiconductor device and method for manufacturing same Y Hayashi, N Inoue, K Hijioka US Patent 7,750,413, 2010 | 53 | 2010 |
| Semiconductor device and method for manufacturing the same K Kaneko, N Inoue, Y Hayashi US Patent 8,618,537, 2013 | 50 | 2013 |
| Highly reliable BEOL-transistor with oxygen-controlled InGaZnO and gate/drain offset design for high/low voltage bridging I/O operations K Kaneko, N Inoue, S Saito, N Furutake, H Sunamura, J Kawahara, ... 2011 International Electron Devices Meeting, 7.4. 1-7.4. 4, 2011 | 47 | 2011 |
| Semiconductor device and method of manufacturing semiconductor device Y Hayashi, N Inoue, K Kaneko US Patent 9,312,394, 2016 | 43 | 2016 |
| Rugged surface poly-Si electrode and low temperature deposited Si/sub 3/N/sub 4/for 64 Mbit and beyond STC DRAM cell M Yoshimaru, J Miyano, N Inoue, A Sakamoto, S You, H Tamura, M Ino International Technical Digest on Electron Devices, 659-662, 1990 | 39 | 1990 |
| Evaluation of HRTFs estimated using physical features N Inoue, T Kimura, T Nishino, K Itou, K Takeda Acoustical science and technology 26 (5), 453-455, 2005 | 33 | 2005 |
| Conductivity control of SiC by in-situ doping and ion implantation T Kimoto, A Itoh, N Inoue, O Takemura, T Yamamoto, T Nakajima, ... Materials Science Forum 264, 675-680, 1997 | 31 | 1997 |
| Semiconductor device with protective layer and method of manufacturing same I Kume, K Hijioka, N Inoue, H Kunishima, M Iguchi, H Shirai US Patent 8,946,800, 2015 | 29 | 2015 |
| Performance Modeling of Low-/Cu Interconnects for 32-nm-Node and Beyond M Tada, N Inoue, Y Hayashi IEEE transactions on electron devices 56 (9), 1852-1861, 2009 | 29 | 2009 |
| Effects of Ti addition on via reliability in Cu dual damascene interconnects M Ueki, M Hiroi, N Ikarashi, T Onodera, N Furutake, N Inoue, Y Hayashi IEEE transactions on electron devices 51 (11), 1883-1891, 2004 | 28 | 2004 |
| Analysis of interface states in LaSixOy metal–insulator–semiconductor structures N Inoue, DJ Lichtenwalner, JS Jur, AI Kingon Japanese Journal of Applied Physics 46 (10R), 6480, 2007 | 26 | 2007 |
| Method of fabricating semiconductor device having memory capacitor including ferroelectric layer made of composite metal oxide N Inoue, Y Hayashi US Patent 6,300,212, 2001 | 26 | 2001 |
| Low thermal-budget fabrication of sputtered-PZT capacitor on multilevel interconnects for embedded FeRAM N Inoue, T Nakura, Y Hayashi International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000 | 26 | 2000 |
Munehiro TadaNanoBridge Semiconductor, Inc.Verified email at ieee.org
