| Going deeper with embedded FPGA platform for convolutional neural network J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ... Proceedings of the 2016 ACM/SIGDA international symposium on field …, 2016 | 1415 | 2016 |
| FP-DNN: An automated framework for mapping deep neural networks onto FPGAs with RTL-HLS hybrid templates Y Guan, H Liang, N Xu, W Wang, S Shi, X Chen, G Sun, W Zhang, J Cong 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom …, 2017 | 365 | 2017 |
| Clicknp: Highly flexible and high performance network processing with reconfigurable hardware B Li, K Tan, L Luo, Y Peng, R Luo, N Xu, Y Xiong, P Cheng, E Chen Proceedings of the 2016 ACM SIGCOMM Conference, 1-14, 2016 | 275 | 2016 |
| FPMR: MapReduce framework on FPGA Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 229 | 2010 |
| ForeGraph: Exploring large-scale graph processing on multi-FPGA architecture G Dai, T Huang, Y Chi, N Xu, Y Wang, H Yang Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 168 | 2017 |
| FTL design exploration in reconfigurable high-performance SSD for server applications JY Shin, ZL Xia, NY Xu, R Gao, XF Cai, S Maeng, FH Hsu Proceedings of the 23rd international conference on Supercomputing, 338-349, 2009 | 159 | 2009 |
| Real-time high-quality stereo vision system in FPGA W Wang, J Yan, N Xu, Y Wang, FH Hsu IEEE Transactions on Circuits and Systems for Video Technology 25 (10), 1696 …, 2015 | 147 | 2015 |
| Parallel inference for latent dirichlet allocation on graphics processing units F Yan, N Xu, Y Qi Advances in neural information processing systems 22, 2009 | 147 | 2009 |
| Field-programmable gate array based accelerator system N Xu, XF Cai, R Gao, J Yan, FH Hsu US Patent 8,131,659, 2012 | 96 | 2012 |
| Large scale recurrent neural network on GPU B Li, E Zhou, B Huang, J Duan, Y Wang, N Xu, J Zhang, H Yang 2014 International Joint Conference on Neural Networks (IJCNN), 4062-4069, 2014 | 74 | 2014 |
| Efficient pagerank and spmv computation on amd gpus T Wu, B Wang, Y Shan, F Yan, Y Wang, N Xu 2010 39th International Conference on Parallel Processing, 81-89, 2010 | 68 | 2010 |
| FxpNet: Training a deep convolutional neural network in fixed-point representation X Chen, X Hu, H Zhou, N Xu 2017 International Joint Conference on Neural Networks (IJCNN), 2494-2501, 2017 | 66 | 2017 |
| The Feniks FPGA operating system for cloud computing J Zhang, Y Xiong, N Xu, R Shu, B Li, P Cheng, G Chen, T Moscibroda Proceedings of the 8th Asia-Pacific Workshop on Systems, 1-7, 2017 | 61 | 2017 |
| Energy efficient neural networks for big data analytics Y Wang, B Li, R Luo, Y Chen, N Xu, H Yang 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2014 | 47 | 2014 |
| FPGA and GPU implementation of large scale SpMV Y Shan, T Wu, Y Wang, B Wang, Z Wang, N Xu, H Yang 2010 IEEE 8th Symposium on Application Specific Processors (SASP), 64-70, 2010 | 47 | 2010 |
| A hybrid CPU-GPU accelerated framework for fast mapping of high-resolution human brain connectome Y Wang, H Du, M Xia, L Ren, M Xu, T Xie, G Gong, N Xu, H Yang, Y He PloS one 8 (5), e62789, 2013 | 34 | 2013 |
| Field-programmable gate array based accelerator system N Xu, FH Hsu, XF Cai US Patent 8,117,137, 2012 | 30 | 2012 |
| Implementation and simulation of a cluster-based hierarchical NoC architecture for multi-processor SoC X Leng, N Xu, F Dong, Z Zhou IEEE International Symposium on Communications and Information Technology …, 2005 | 30 | 2005 |
| A low-latency FPGA implementation for real-time object detection J Zhang, L Cheng, C Li, Y Li, G He, N Xu, Y Lian 2021 IEEE international symposium on circuits and systems (ISCAS), 1-5, 2021 | 25 | 2021 |
| Parallel processing of data sets N Xu, FH Hsu, F Yan US Patent 8,868,470, 2014 | 25 | 2014 |
